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MCS4
Microcomputer
Kit
MCS~4
- INTEL'S LOWEST COST MICROCOMPUTER.
IDEAL FOR
PROTOTYPE OR LOW VOLUME
PRODUCTION.
The MCS-4 is a microprogrammable
computer set designed
for
applications
such
as
test systems, peripherals,
terminals,
billing machines, measuring
systems, numeric and process
control.
The 4004
CPU,
4003
SR,
and 4002
RAM
are standard building blocks.
The
4008 and
4009
are a pair
of
inter-
face devices which expand the capa-
bilities of
Intel's MCS-4 microcomputer
set. Now standard
Intel PROMs, ROMs
and RAMs may
be
used
for
the pro-
gram memory of the MCS-4.
MCS-4 systems interface easily with
switches, keyboards, displays, teletype-
writers, printers, readers, A-D con-
verters and other popular peripherals.
A system built with the
MCS-4 micro-
computer set can have up to
4K
x 8
bit
ROM
words, 1280 x 4
bit
RAM
characters and 128
I/O
lines without
4004 CPU
~"f
I
16
""l
CM·RAM,
MEMORY
BUS
CONTROL
I/O
0,
CM.RAM,
OUTPUTS
0,
CM·RAM
3
GNO
Vss
5 12
Voo
-15V
p~~g~~}<p,
{MEMORY
6
II
CM·ROM
CONTROL
.
OUTPUT
p~~~m<p,
7
Ou;~~nSYNC
8
4702A ROM
·THIS
PIN
IS
THE
DATA
INPUT
LEAD
DURING
PROGRAMMING.
requiring any interface logic. By adding
a few simple gates the
MCS-4 can
have
up
to
48
RAM and
ROM
packages
in
any combination, and 192
I/O
lines.
The
MCS-4 has a very powerful in-
struction set that allows both binary
and decimal arithmetic.
It includes
conditional branching, jump to sub-
routine, and provides
for
the efficient
use
of
ROM
look-up tables by indirect
fetching.
The
Intel MCS-4 microcomputer set
(4002/3/4/8/9
and 4702A) are fabri-
cated with Silicon Gate Technology.
This low threshold technology allows
the design and production of higher
performance
MaS
circuits and provides
a higher functional density on a mono-
lithic chip than conventional
MaS
technologies.
4002
RAM
""f
I
16
'j
0,
BUS
OUTPUT
1100,
O
2
LINES
0
3
0
3
12
Voo
-15V
p~~i~}<p,
{MEMORY
6
II
CM
CONTROL
INPUT
p~l~g}<P,
7
10
·lHAROWIREO
Po
CHIPSELECT
I~~~~}SYNC
INPUT
8 9
RESET
4008
MCS4
KIT
A
• Programmable General
Purpose Microcomputer
• 4-Bit Parallel CPU with 46
Instructions
• Instruction Set includes
Conditional Branching,
Jump to Subroutine and
Indirect Fetching
• Binary and Decimal
Arithmetic Modes
• Program Storage
in
4702A
Reprogrammable PROM
Simulates
4001
ROM
•
2-Phase Dynamic Operation
• 10.8 Microsecond
Instruction Cycle
•
CPU Directly Compatible
with
MCS-4 ROMs and
RAMs Using
4008/4009
Standard Memory
ana
1/0
Interface Set
• Easy
Expansion-One
CPU
can
Directly Drive up to
32,768 Bits of
ROM and up
to
5120 Bits of RAM
4003SR
PULSE
~~~~*p
I
PARALLEL{Oo
3
OUTPUTS
13
n,
')
a.
a
PARALLEL
f
6
7
OUTPUTS
PARALLEL
0
a.
OUTPUTS
3
O.
05
4009