S1C88650 TECHNICAL MANUAL EPSON 83
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Clock Timer)
5.9.3 Control of clock timer
Table 5.9.3.1 shows the clock timer control bits.
Table 5.9.3.1 Clock timer control bits
D7
D6
D5
D4
D3
D2
D1
D0
WDEN
FOUT2
FOUT1
FOUT0
FOUTON
WDRST
TMRST
TMRUN
Watchdog timer enable
FOUT frequency selection
FOUT output control
Watchdog timer reset
Clock timer reset
Clock timer Run/Stop control
FOUT2
0
0
0
0
1
1
1
1
FOUT1
0
0
1
1
0
0
1
1
FOUT0
0
1
0
1
0
1
0
1
Frequency
f
OSC1
/ 1
f
OSC1
/ 2
f
OSC1
/ 4
f
OSC1
/ 8
f
OSC3
/ 1
f
OSC3
/ 2
f
OSC3
/ 4
f
OSC3
/ 8
00FF40
Constantly "0" when
being read
1
0
0
0
0
–
–
0
R/W
R/W
R/W
R/W
R/W
W
W
R/W
Enable
On
Reset
Reset
Run
Disable
Off
No operation
No operation
Stop
Address Bit Name SR R/WFunction Comment10
00FF41 D7
D6
D5
D4
D3
D2
D1
D0
TMD7
TMD6
TMD5
TMD4
TMD3
TMD2
TMD1
TMD0
Clock timer data
Clock timer data
Clock timer data
Clock timer data
Clock timer data
Clock timer data
Clock timer data
Clock timer data
0R
High Low
1 Hz
2 Hz
4 Hz
8 Hz
16 Hz
32 Hz
64 Hz
128 Hz
00FF20 D7
D6
D5
D4
D3
D2
D1
D0
PK01
PK00
PSIF1
PSIF0
–
–
PTM1
PTM0
Constantly "0" when
being read
0
0
–
–
0
R/W
R/W
R/W
–
–
–
–
K00–K07 interrupt priority register
Serial interface interrupt priority register
–
–
Clock timer interrupt priority register
PK01
PSIF1
1
1
0
0
Priority
level
PK00
PSIF0
1
0
1
0
Level 3
Level 2
Level 1
Level 0
PTM1
1
1
0
0
Priority level
PTM0
1
0
1
0
Level 3
Level 2
Level 1
Level 0
00FF22 D7
D6
D5
D4
D3
D2
D1
D0
–
–
–
–
ETM32
ETM8
ETM2
ETM1
–
–
–
–
Clock timer 32 Hz interrupt enable register
Clock timer 8 Hz interrupt enable register
Clock timer 2 Hz interrupt enable register
Clock timer 1 Hz interrupt enable register
–
–
–
–
0 R/W
–
–
–
–
Interrupt
enable
–
–
–
–
Interrupt
disable
Constantly "0" when
being read
00FF26 D7
D6
D5
D4
D3
D2
D1
D0
–
–
–
–
FTM32
FTM8
FTM2
FTM1
–
–
–
–
Clock timer 32 Hz interrupt factor flag
Clock timer 8 Hz interrupt factor flag
Clock timer 2 Hz interrupt factor flag
Clock timer 1 Hz interrupt factor flag
Constantly "0" when
being read
–
–
–
–
0 R/W
–
–
–
–
(R)
Generated
(W)
Reset
–
–
–
–
(R)
Not generated
(W)
No operation
