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Chapter 23 Sub Oscillation Stabilisation Timer
7.Q & A
7.6 How is the interrupt enabled?
The interrupt request enable and the interrupt request flag
The interrupt enable is set with the interrupt request enable bit (WPCRH.WIE).
The interrupt request is cleared with the interrupt request bit (WPCRH.WIF).
7.7 How is the sub oscillation stabilisation timer stopped counting?
Sets with the timer operation enable bit (WPCRH.WEN). Refer to 7.3.
In addition, if the MCU stops the sub clock while the mainclock is being operated, the sub clock oscillation
stability wait timer also stops counting.
Interrupt request enable bit (WIE)
Interrupt disable Set the value to “0”
Interrupt enable Set the value to “1”
Interrupt request bit (WIF)
Interrupt request clear Writes “0”
