FUNCTIONAL DESCRIPTION
Bits BI, FE, PE, and OE are the sources of receiver
line status interrupts. The bits are reset by reading
the line status register. In FIFO mode, these bits
are associated with a specific character in the FIFO
and the exception is revealed only when that character
reaches the top of the FIFO.
BI - Break Interrupt:
Indicates the receive data input has been in the
spacing state (logic 0) for longer than one full
word transmission time.
FIFO mode:
Only one zero character is loaded into the FIFO
and transfers are disabled until SIN goes to the
mark state (logic 1) and a valid start bit is
received.
FE - Framing Error:
Indicates the received character had an invalid
stop bit. The stop bit following the last data
or parity bit was a 0 bit (spacing level).
PE - Parity Error:
Indicates that the received data does not have
the correct parity.
OE - Overrun Error:
Indicates the receive buffer was not read before
the next character was received and the character
is destroyed.
FIFO mode:
Indicates the FIFO is full and another character
has been shifted in. The character in the shift
register is destroyed but is not transferred to
the FIFO.
DR - Data ready:
Indicates data is present in the receive buffer
or FIFO. DR is reset by reading the receive
buffer register or receiver FIFO.
iii
