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MB15F74UV
4
■
■■
■
BLOCK DIAGRAM
(10)
Clock
Data
LE
PSRF
XfinRF
finRF
OSCIN
finIF
PSIF
VCCIF GNDIF
fpIF
DoIF
LDIF
T1 T2
T1 T2
FCRF
SWRF
LDS
DoRF
OR
LD/
fout
LD
frIF
frRF
fpIF
fpRF
frIF
frRF
fpRF
C
N
1
C
N
2
AND
V
CCRF
GNDRF
(18)
( )
(9)
(16)
(17)
(11) (12)
(8)
(6)
(4)
(5)
(2)
(7)
(14)
GND
(1)
(15)
13
XfinIF
(3)
Intermittent
mode control
(IF-PLL)
Prescaler
(IF-PLL)
(32/33, 64/65)
7 bit latch 11 bit latch
Binary 7-bit
swallow counter
(IF-PLL)
Binary 11-bit
programmable
counter (IF-PLL)
Phase
comp.
(IF-PLL)
Charge
pump
(IF-PLL)
Current
Switch
2 bit latch 14 bit latch 1 bit latch
Binary 14-bit pro-
grammable ref.
counter(IF-PLL)
C/P setting
counter
Lock Det.
(IF-PLL)
2 bit latch 14 bit latch 1 bit latch
Binary 14-bit pro-
grammable ref.
counter (RF-PLL))
C/P setting
counter
Selector
Prescaler
(RF-PLL)
(64/65, 128/129)
Lock Det.
(RF-PLL)
Intermittent
mode control
(RF-PLL)
3 bit latch
FCIF
SWIF
LDS
3 bit latch
7 bit latch 11 bit latch
Binary 7-bit
swallow counter
(RF-PLL)
Binary 11-bit
programmable
counter (RF-PLL)
Phase
comp.
(RF-PLL)
Fast lock
Tuning
Charge
pump
(RF-PLL)
Current
Switch
Schmitt
trigger
circuit
Latch selector
23-bit shift register
Fast
lock
Tuning
LD
RF
fpRF
Fast
lock
Tuning
Schmitt
trigger
circuit
Schmitt
trigger
circuit