Dell™ PowerEdge™ T610 Technical Guidebook
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The PowerEdge T610 BIOS does not support the following:
•EmbeddedDiags
•BIOSlanguagelocalization
•BIOSrecoveryafterbadash(butcanberecoveredfromiDRAC6Express)
Refer to the PowerEdge T610 BIOS Specification document for information related to BIOS.
B. Supported ACPI States
Advanced Configuration and Power Interface – A standard interface for enabling the operating system
to direct configuration and power management.
The Nehalem processor supports the following C‑States: C0, C1, C1E, C3, and C6. The PowerEdge T610
will support all of the available C‑States.
The PowerEdge T610 will support the available P‑States as supported by the specific Nehalem processors:
Table: Nehalem P-State Projections
C. I
2
C (Inter-Integrated Circuit)
What is I
2
C? A simple bi‑directional 2‑wire bus for ecient inter‑integrated circuit control. All I
2
C‑bus
compatible devices incorporate an on‑chip interface which allows them to communicate directly with
each other via the I
2
C‑bus. This design concept solves the many interfacing problems encountered
when designing digital control circuits. These I
2
C devices perform communication functions between
intelligent control devices (e.g., microcontrollers), general‑purpose circuits (e.g., LCD drivers, remote
I/O ports, memories) and application‑oriented circuits.
The PowerEdge T610 BIOS accesses the I
2
C through the ICH9 (Intel I/O Controller Hub 9). There are two
MUXes on ICH9’s I
2
C bus.
The clock chips, USB hub, iSCSI key and TPM device addresses are located on the ICH9 I
2
C bus.
PROC
NUMBER
QFD # FREQUENCY
STANDARD
TDP
LFM TDP P-STATE NOTES
1.60 Pmin+1
1.73 Pmin+1
E5502
Q1G8 1.86 80 75 Pmin+2 D-0
E5504
Q1GM 2.00 80 75 Pmin+3 D-0
L5506
Q1HG 2.13 60 52 Pmin+4 D-0
E5506
Q1GL 2.13 80 75 Pmin+4 D-0
L5520
Q1GN 2.26 60 52 Pmin+5 D-0
E5520
Q1GR 2.26 80 75 Pmin+5 D-0
E5530
Q1GK 2.40 80 75 Pmin+6 D-0
E5540
Q1G2 2.53 80 75 Pmin+7 D-0
X5550
Q1GJ 2.67 95 75 Pmin+8 D-0
X5560
Q1GF 2.80 95 75 Pmin+9 D-0
X5570
Q1G9 2.93 95 75 Pmin+10 D-0
