IXF1104 Quad-Port 10/100/1000 Mbps Ethernet Media Access Controller
Datasheet 107
Document Number: 278757
Revision Number: 007
Revision Date: March 25, 2004
5.7.2 Functional Descriptions
5.7.2.1 High-Speed Serial Interface
These signals are responsible for transfer of the actual data at 1.25 Gbps. Table 41 “Intel®
IXF1104 MAC DC Specifications” on page 133 shows the data is 8B/10B encoded and transmitted
differentially.
The following signals are required to implement the high-speed serial interface:
• TX_P_0:3
• TX_N_0:3
• RX_P_0:3
• RX_N_0:3
5.7.2.2 Low-Speed Status Signaling Interface
The following Low-Speed signals indicate the state of the line through the Optical Module
Interface:
• MOD_DEF_0:3
• TX_FAULT_0:3
• RX_LOS_0:3
• TX_DISABLE_0:3
• MOD_DEF_INT
• TX_FAULT_INT
• RX_LOS_INT
5.7.2.2.1 MOD_DEF_0:3
MOD_DEF_0:3 are direct inputs to the IXF1104 and are pulled to a logic Low level during normal
operation, indicating that a module is present for each channel respectively. If a module is not
present, a logic High is received, which is achieved by an external pull-up resistor at the IXF1104
device pad.
TX_DISABLE_0:3 TX DISABLE
Transmitter disable, logic High, open
collector compatible
Output from the IXF1104
TX_FAULT_0:3 TX FAULT
Transmitter fault, logic High, open
collector compatible
Input to the IXF1104
RX_LOS_0:3 LOS
Receiver loss-of-signal, logic High,
open collector compatible
Input to the IXF1104
Table 30. IXF1104-to-SFP Optical Module Interface Connections (Sheet 2 of 2)
IXF1104
Signal Names
SFP Signal
Names
Description Notes
