System Board
Input/output Controller Hub 2 (82801BA)
Chapter 2
47
USB works only if you’ve enabled the USB interface within the HP Setup program.
Currently, only Microsoft Windows 95 SR2.1, Windows 98, and Windows 2000 provide
USB support.
AC’97 Controller
The AC’97 controller is a single-chip CS4299 audio controller that provides full audio
features for the HP Workstation x2100.
For information about the CS4299 audio solution, see page 48.
IDE Controller
The IDE controller is implemented as part of the ICH2 chip and has PCI-Master
capability. Two independent ATA/100 IDE channels are provided with two connectors
per channel. You can connect two IDE devices (one master and one slave) per channel. To
guarantee data transfer integrity, you must use Ultra-ATA cables for Ultra-ATA modes
(Ultra-ATA/33, Ultra-ATA/66, and Ultra-ATA/100).
The PIO IDE transfers as fast as 14MB/sec, and the system supports Bus Master IDE
transfer rates of as fast as 66MB/sec. The IDE controller integrates 16 x 32-bit buffers
for optimal transfers.
You can mix a fast and a slow device (for example, a hard disk and a CD-ROM) on the
same channel without affecting the performance of the faster device. The BIOS
automatically determines the fastest configuration that each device supports.
DMA Controller
The seven-channel DMA controller incorporates the functionality of two 82C37 DMA
controllers. Channels zero to three are for 8-bit count-by-byte transfers, whereas
channels five to seven are for 16-bit count-by-word transfers. (For allocated DMA
channel allocations, see the table on page 74.) You can program any two of the seven
DMA channels to support fast Type-F transfers.
The ICH2 DMA controller supports the LPC DMA. The LPC interface supports Single,
Demand, Verify, and Incremental modes. Channels zero to three are 8-bit, whereas
channels five to seven are 16-bit. Channel four is reserved as a generic bus master
request.
Interrupt Controller
The interrupt controller is equivalent in function to the two 82C59 interrupt controllers.
The two interrupt controllers are cascaded so that 14 external and 2 internal interrupts
are possible. In addition, the ICH2 supports a serial interrupt scheme and also
implements the I/O APIC controller. The table on page 60 shows how the master and
slave controllers are connected.
Timer/Counter Block
The timer/counter block contains three counters that are equivalent in function to those
found in one 82C54 programmable interval counter/timer. These three counters provide
the system timer function and speaker tone. The 14.318MHz oscillator input provides
the clock source for these three counters.
