54 Chapter 3
Power-On Self Test
Overview
Overview
Upon power up, all processors and hardware must be initialized before
the node proceeds with booting. POST begins executing and brings up
the node from an indeterminate state and then calls OBP.
None of the POST modules can be directly controlled via a user interface.
Program control is provided by a set of configuration parameters
(processing flags and variable definitions) stored in NVRAM by OBP,
do_rest, or xconfig.
The error reporting modules display error codes for all fatal errors that
occur during the POST execution. Any errors that can be recovered from,
are reported to OBP. POST status is reflected on the LCD display.
POST performs the following tasks:
• Initializes and conditionally performs cache tests on each processor in
the node
• Validates all shared data structures within the NVRAM.
• Initializes the core logic required to start OBP execution
• Determines node configuration
• Initializes all ASICs
• Initializes main memory
• Sets up CTI cache
• Invokes OBP or the Test Controller.
Any fatal errors are reported to the user by way of the system LCD and
the system console. POST passes node configuration and any options to
OBP via shared data structures.
Reset
The following types of reset invoke POST:
• Power up reset— If a client had execution control before the power
down condition, it invokes POST to initialize the hardware. POST
initializes all hardware after a power up reset.
