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configurable LEDs allow to make internal monitoring status signals visible by driving the
appropriate FPGA IO to a HIGH level.
LEDs
Signal Name FPGA IO Comment
SYS_LED0 -- Internal 5V power supply.
SYS_LED1 -- Power OK- signal from onboard voltage regulator.
SYS_LED2 V17 Illuminates to indicate the status of the DONE pin if FPGA is
successfully configured.
USER_LED0 P7 User- configurable LED.
USER_LED1 N7 User- configurable LED.
USER_LED2 P8 User- configurable LED.
USER_LED3 N6 User- configurable LED.
USER_LED4 R7 User- configurable LED.
The HEX rotary DIP switch is of binary coded type. The four weighted terminals are
externally pulled HIGH with 4,7 kOhm resistors, the common terminals are connected to
GND. Therefore the four FPGA inputs behave like a complementary binary coded
hexadecimal switch.
HEX rotary DIP switch
DIAL FPGA Pin N8 FPGA Pin M11 FPGA Pin M10 FPGA Pin N9
0 1 1 1 1
1 0 1 1 1
2 1 0 1 1
3 0 0 1 1
4 1 1 0 1
USBS6 / C1030-5510 http://www.cesys.com/
User Doc V0.3 -12- preliminary
Figure 4: Bitte durch Orginalbild ersetzen