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J3 VG 96-pin external expansion connector
PIN FPGA
IO
Comment PIN FPGA
IO
Comment PIN FPGA
IO
Comment
A32 -- GND B32 -- GND C32 -- GND
A31 F13 VG96_IO78 B31 E13 VG96_IO79 C31 C4 VG96_IO80
A30 F12 VG96_IO75 B30 E12 VG96_IO76 C30 F11 VG96_IO77
A29 D11 VG96_IO72* B29 C11 VG96_IO73* C29 E11 VG96_IO74
A28 G11 VG96_IO69 B28 F10 VG96_IO70 C28 G8 VG96_IO71
A27 G9 VG96_IO66 B27 F9 VG96_IO67 C27 F8 VG96_IO68
A26 D9 VG96_IO63* B26 C9 VG96_IO64* C26 D8 VG96_IO65
A25 E7 VG96_IO60 B25 E8 VG96_IO61 C25 C8 VG96_IO62
A24 D6 VG96_IO57 B24 C6 VG96_IO58 C24 F7 VG96_IO59
A23 F6 VG96_IO54 B23 F5 VG96_IO55 C23 E6 VG96_IO56
A22 -- GND B22 -- GND C22 -- GND
A21 E4 VG96_IO51 B21 D3 VG96_IO52 C21 F4 VG96_IO53
A20 H7 VG96_IO48 B20 G6 VG96_IO49 C20 F3 VG96_IO50
A19 H4 VG96_IO45* B19 H3 VG96_IO46* C19 J7 VG96_IO47
A18 H6 VG96_IO42 B18 H5 VG96_IO43 C18 J6 VG96_IO44
A17 K4 VG96_IO39* B17 K3 VG96_IO40* C17 L6 VG96_IO41
A16 L7 VG96_IO36 B16 K6 VG96_IO37 C16 M5 VG96_IO38
A15 L5 VG96_IO33* B15 K5 VG96_IO34* C15 E3 VG96_IO35
A14 L4 VG96_IO30 B14 L3 VG96_IO31 C14 E1 VG96_IO32
A13 C2 VG96_IO27 B13 C1 VG96_IO28 C13 G3 VG96_IO29
A12 D2 VG96_IO24 B12 D1 VG96_IO25 C12 G1 VG96_IO26
A11 F2 VG96_IO21 B11 F1 VG96_IO22 C11 J3 VG96_IO23
A10 H2 VG96_IO18* B10 H1 VG96_IO19* C10 J1 VG96_IO20
A9 K2 VG96_IO15 B9 K1 VG96_IO16 C9 M3 VG96_IO17
A8 L2 VG96_IO12 B8 L1 VG96_IO13 C8 M1 VG96_IO14
USBS6 / C1030-5510 http://www.cesys.com/
User Doc V0.3 -14- preliminary
Figure 5: VG 96-pin external expansion connector J3