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Data area entry
A data area entry can be used to communicate with a data block inside the FPGA,
examples are RAM or flash areas. Data can be transfered from and to files, as well as
displayed in a live view. An entry constits of the following data:
• Address
• Name
• Data alignment
• Size
• Read-only flag
The visual representation is shown below.
Figure 19: Data area panel
Similar to the register visualization, the buttons on the right side can be used to add, move
and remove data area panels. The header shows the name and the address followed by
the data area details. Below are these buttons:
• Device To File: The complete area is read and stored to the file which is defined in the
file dialog opening after clicking the button.
• File To Device: This reads the file selected in the upcoming file dialog and stores the
contents in the data area, limited by the file size or data area size. This button is not
shown if the Read-only flag is set.
• Live View: If this button is active, the text view below shows the contents of the area,
updated every 100 ms, the view can be scrolled, so every piece can be visited.
USBS6 / C1030-5510 http://www.cesys.com/
User Doc V0.3 -59- preliminary