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AD9912
Rev. D | Page 15 of 40
INPUT/OUTPUT TERMINATION RECOMMENDATIONS
DOWNSTREAM
DEVICE
(HIGH-Z)
AD9912
1.8V
HSTL
OUTPUT
100Ω
06763-027
0.01µF
0.01µF
Figure 33. AC-Coupled HSTL Output Driver
DOWNSTREAM
DEVICE
(HIGH-Z)
AD9912
1.8V
HSTL
OUTPUT
50Ω
50Ω
06763-028
AVDD/2
Figure 34. DC-Coupled HSTL Output Driver
AD9912
SELF-BIASING
SYSCLK
INPUT
(CRYSTAL
MODE)
10pF*
06763-029
10pF*
REFER TO CRYSTAL
DATA SHEET.
*
Figure 35. SYSCLK Input, Xtal
AD9912
SELF-BIASING
SYSCLK
INPUT
0.1µF
0.1µF
100Ω
06763-030
CLOCK
SOURCE
WITH DIFF.
OUTPUT
Figure 36. SYSCLK Differential Input, Non-Xtal
AD9912
SELF-BIASING
SYSCLK
INPUT
0.01µF
0.01µF
06763-049
CLOCK SOURCE
WITH
SINGLE-ENDED
1.8V CMOS
OUTPUT
Figure 37. SYSCLK Single-Ended Input, Non-Xtal
AD9912
SELF-BIASING
FDBK INPUT
0.1µF
0.1µF
06763-050
100Ω
(OPTIONAL)
Figure 38. FDBK_IN Input