Intel MPCMM0002 Drums User Manual


 
MPCMM0002 CMM—Guidelines for Third Party Chassis Vendors
Intel NetStructure
®
MPCMM0002 Chassis Management Module
Hardware TPS July 2007
62 Order Number: 309247-004US
13.0 Guidelines for Third Party Chassis Vendors
This chapter describes some of the high level design of the Intel NetStructure
®
MPCMM0002 Chassis Management Module to help third party chassis vendors better
understand how to incorporate the CMM into their chassis.
Note: The chapter excludes any low level design details of the individual components of the
Chassis Management Module or the CMM firmware. This chapter also does not explain
how to configure the CMM to work in a third party chassis. That information is
contained in the Intel NetStructure
®
MPCMM0001 Chassis Management Module and
Intel NetStructure
®
MPCMM0002 CMM Software Technical Product Specification for
version 6.1.
13.1 High Level Design
At a very high level, the CMM can be thought of as a black box, which has 42 IPMB
buses to allow a variety of bus topologies. The GPIO signals are for user-defined
purposes, and the dedicated I/O signals are used for certain dedicated functionality
explained later.
Figure 32 illustrates this high level CMM design.
The figure below provides next level of details on how these pins are wired to different
components on the CMM hardware.
Figure 32. High Level CMM Design
CMM
10 GPIOs
42 IPMB Buses
Dedicated I/O
Signals