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10 Altera Corporation
Overview
Code Example 2 shows how to write a single byte to memory, even if the
address of the byte is not native-word-aligned.
Code Example 2: Single Byte Written to Memory—Address is not Native-word-aligned
Addressing
Modes
The topics in this section includes a description of the following
addressing modes:
■ 5/16-bit immediate
■ Full width register-indirect
■ Partial width register-indirect
■ Full width register-indirect with offset
■ Partial width register-indirect with offset
5/16-bit Immediate Value
Many arithmetic and logical instructions take a 5-bit immediate value as
an operand. The ADDI instruction, for example, has two operands: a
register and a 5-bit immediate value. A 5-bit immediate value represents
a constant from 0 to 31. To specify a constant value that requires from 6 to
16 bits (a number from 32 to 65535), the 11-bit K register can be set using
the PFX instruction, This value is concatenated with the 5-bit immediate
value. The PFX instruction must be used directly before the instruction it
modifies.
To support breaking 16-bit immediate constants into a PFX value and a
5-bit immediate value, the assembler provides the operators %hi() and
%lo(). %hi(x) extracts the 11 bits from bit 5 to bit 15 from constant x, and
%lo(x) extracts the 5 bits from bit 0 to bit 4 from constant x.
Instructions executed on a 32-bit Nios CPU
;Let’s assume %o4 contains the address 0x00001203
; and that %g3 contains the value 0x00000054
FILL8 %r0,%g3 ; (First operand can only be %r0)
; replicate low byte of %g3 across %r0
; so %r0 contains 0x54545454
ST8d [%o4],%r0 ; (Second operand can only be %r0)
; Stores the 3rd byte of %r0 to address 0x1203
Contents of memory after:
0 1 2 3
0x00001200 0x46 0x49 0x53 0x54