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Altera Corporation 57
3232323232-Bit Instruction Set
2
32-Bit Instruction
Set
IFS
Conditionally Execute Next Instruction
Operation:
if (condition IMM4 is false)
then begin
if (Mem16[PC + 2] is PFX)
then PC ← PC + 6
else PC ← PC + 4
end
Assembler Syntax: IFS cc_IMM4
Example: IFS cc_ne
BSR SendIt ; only call if Z flag set
NOP ; (delay slot) executed in either case
Description: Execute next instruction if specified condition is true, skip if condition is false. If
the next instruction is PFX, then both PFX and the instruction following PFX are
skipped together.
Condition Codes: Settings:
1 These condition
codes have
different numeric
values for IFS and
SKPS instructions.
cc_nc 0x0 (not C)
cc_c 0x1 (C)
cc_nz 0x2 (not Z)
cc_z 0x3 (Z)
cc_pl 0x4 (not N)
cc_mi 0x5 (N)
cc_lt 0x6 (N xor V)
cc_ge 0x7 (not (N xor V))
cc_gt 0x8 (Not (Z or (N xor V)))
cc_le 0x9 (Z or (N xorV))
cc_nv 0xa (not V)
cc_v 0xb (V)
cc_hi 0xc (not (C or Z))
cc_la 0xd (C or Z)
Additional alias flags allowed:
cc_cs = cc_c
cc_eq = cc_z
cc_n = cc_mi
cc_vs = cc_v
cc_cc = cc_nc
cc_ne = cc_nz
cc_vc = cc_nv
cc_p = cc_pl
Codes mean execute if, e.g., ifs cc_eq means execute if equal
Instruction Format: i4w
Instruction Fields: IMM4 = 4-bit immediate value
1514131211109876543210
011111101110 IMM4