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62 Altera Corporation
32-Bit Instruction Set
LRET
Equivalent to JMP %o7
Operation:
PC ← (%o7 << 1)
Assembler Syntax: LRET
Example: LRET ; return
NOP ; (delay slot)
Description: Jump to the target-address given by (%o7 << 1). Note that the target address will
always be half-word aligned for any value of %o7.
Condition Codes: Flags: Unaffected
Delay Slot Behavior: The instruction immediately following LRET (LRET’s delay slot) is executed after
LRET, but before the destination instruction. There are restrictions on which
instructions may be used as a delay slot. (Refer to “Branch Delay Slots” on
page 23)
Instruction Format: Rw
Instruction Fields: None (always uses %o7)
1514131211109876543210
0111111111001111
NVZC
−−−−