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36 Altera Corporation
32-Bit Instruction Set
ADDI
Add Immediate
Operation: RA ← RA + (0x00.00 : K :IMM5)
Assembler Syntax: ADDI %rA,IMM5
Example: Not preceded by PFX:
ADDI %L5,6 ; add 6 to %L5
Preceded by PFX:
PFX %hi(1000)
ADDI %g3,%lo(1000) ; ADD 1000 to %g3
Description: Not preceded by PFX:
Adds 5-bit immediate value to register A, stores result in register A. IMM5 is in the
range [0..31].
Preceded by PFX:
The immediate operand is extended from 5 to 16 bits by concatenating the
contents of the K-register (11 bits) with IMM5 (5 bits). The 16-bit immediate value
(K : IMM5) is zero-extended to 32 bits and added to register A.
Condition Codes: Flags:
N: Result bit 31
V: Signed-arithmetic overflow
Z: Set if result is zero; cleared otherwise
C: Carry-out of addition
Instruction Format: Ri5
Instruction Fields: A = Register index of RA operand
IMM5 = 5-bit immediate value
1514131211109876543210
000001 IMM5 A
NVZC
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