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20 Altera Corporation
Overview
3. IE is set to 0, disabling interrupts.
4. IPRI is set with the 6-bit number of the exception.
5. The address of the next non-executed instruction in the interrupted
program is transferred into %o7.
6. The start-address of the exception handler is fetched from the
exception vector table and written into the PC.
7. After the exception handler finishes a TRET instruction is issued to
return control to the interrupted program.
Register Window Usage
All exception processing starts in a newly opened register window. This
process decreases the complexity and latency of exception handlers
because they are not responsible for maintaining the interruptee’s register
contents. An exception handler can freely use registers %o0..%L7 in the
newly opened window. An exception handler should not execute a SAVE
instruction upon entry. The use of SAVE and RESTORE from within
exception handlers is discussed later.
Because the transfer to exception handling always opens a new register
window, programs must always leave one register window available for
exceptions. Setting LO-LIMIT to 1 guarantees that one window is
available for exceptions (The reset value of LO_LIMIT is 1). Whenever a
program executes a SAVE instruction that would then use up the last
register window (CWP = 0), a register-underflow trap is generated. The
register-underflow handler itself will execute in the final window (with
CWP = 0).
Correctly written software will never process an exception when CWP
is 0. CWP will only be 0 when an exception is being processed, and
exception handlers must take certain well-defined precautions before
re-enabling interrupts. See “Simple and Complex Exception Handlers” on
page 21 for more information.
Status Preservation: ISTATUS Register
When an exception occurs, the interruptee’s STATUS register is copied
into the ISTATUS register. The STATUS register is then modified (IE set
to 0, IPRI set, CWP decremented). The original contents of the STATUS
register are preserved in the ISTATUS register. When exception
processing returns control to the interruptee, the original program’s
STATUS register contents are restored from ISTATUS by the TRET
instruction.