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Altera Corporation 47
3232323232-Bit Instruction Set
2
32-Bit Instruction
Set
EXT16d
Half-Word Extract (Dynamic)
Operation:
RA ← (0x00.00 :
hn
RA) where n = RB[1]
Assembler Syntax: EXT16d %rA,%rB
Example: LD %i3,[%i4] ; get 32 bits from [%i4 & 0xFF.FF.FF.FC]
EXT16d %i3,%i4 ; extract short int at %i4
Description: Extracts one of the two half-words in RA. The half-word to-be-extracted is chosen
by bit 1 of RB. The selected half-word is written into bits 15..0 of RA, and the
more-significant bits 31..16 are set to zero.
Condition Codes: Flags: Unaffected
Instruction Format: RR
Instruction Fields: A = Register index of operand RA
B = Register index of operand RB
1514131211109876543210
011010 B A
NVZC
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