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68 Altera Corporation
32-Bit Instruction Set
MOVHI
Move Immediate Into High Half-Word
Operation:
h1
RA ← (K : IMM5),
h0
RA unaffected
Assembler Syntax: MOVHI %rA,IMM5
Example: Not preceded by PFX:
MOVHI %g3,23 ; upper 16 bits of %g3 get 23
Preceded by PFX:
PFX %hi(100)
MOVHI %g3,%lo(100) ; upper 16 bits of %g3 get 100
Description: Not preceded by PFX:
Copy IMM5 to the most significant half-word (bits 31..16) of RA. The least
significant half-word (bits 15..0) is unaffected.
Preceded by PFX:
The immediate operand is extended from 5 to 16 bits by concatenating the
contents of the K-register (11 bits) with IMM5 (5 bits). The 16-bit immediate value
(K : IMM5) is copied into the most significant half-word (bits 31..16) of RA. The
least significant half-word (bits 15..0) is unaffected.
Condition Codes: Flags: Unaffected
Instruction Format: Ri5
Instruction Fields: A = Register index of operand RA
IMM5 = 5-bit immediate value
1514131211109876543210
011011 IMM5 A
NVZC
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