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Altera Corporation 75
3232323232-Bit Instruction Set
2
32-Bit Instruction
Set
OR
Bitwise Logical OR
Operation: Not preceded by PFX:
RA ← RA | RB
Preceded by PFX:
RA ← RA | (0x00.00 : K: IMM5)
Assembler Syntax: Not preceded by PFX:
OR %rA,%rB
Preceded by PFX:
PFX %hi(const)
OR %ra,%lo(const)
Example: Not preceded by PFX:
OR %i0,%i1 ; OR %i1 into %i0
Preceded by PFX:
PFX %hi(3333)
OR %i0,%lo(3333) ; OR %i0 with 3333
Description: Not preceded by PFX:
Logically-OR the individual bits in RA with the corresponding bits in RB; store the
result in RA.
Preceded by PFX:
When prefixed, the RB operand is replaced by an immediate constant formed by
concatenating the contents of the K-register (11 bits) with IMM5 (5 bits). This
16-bit value is zero-extended to 32 bits, then bitwise-ORed with RA. The result is
written back into RA.
Condition Codes: Flags:
N: Result bit 31
Z: Set if result is zero; cleared otherwise
Instruction Format: RR, Ri5
Instruction Fields A = Register index of operand RA
B = Register index of operand RB
IMM5 = 5-bit immediate value
Not preceded by PFX (RR)
1514131211109876543210
010000 B A
Preceded by PFX (Ri5)
15 14 13 12 11 10 9 8 7 6 5 4 3 2
10
010000 IMM5 A
NVZC
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