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Altera Corporation 63
3232323232-Bit Instruction Set
2
32-Bit Instruction
Set
LSL
Logical Shift Left
Operation:
RA ← (RA << RB[4..0]), zero-fill from right
Assembler Syntax: LSL %rA,%rB
Example: LSL %L3,%g0 ; Shift %L3 left by %g0 bits
Description: The value in RA is shifted-left by the number of bits indicated by RB [4..0] (bits
31..5 of RB are ignored).
Condition Codes: Flags: Unaffected
Instruction Format: RR
Instruction Fields: A = Register index of RA operand
B = Register index of RB operand
1514131211109876543210
000110 B A
NVZC
−−−−