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Altera Corporation 77
3232323232-Bit Instruction Set
2
32-Bit Instruction
Set
RDCTL
Read Control Register
Operation:
RA ← CTLk
Assembler Syntax: RDCTL %rA
Example: Not preceded by PFX:
RDCTL %g7 ; Loads %g7 from STATUS reg (%ctl0)
Preceded by PFX:
PFX 2
RDCTL %g7 ; Loads %g7 from WVALID reg (%ctl2)
Description: Not preceded by PFX:
Loads RA with the current contents of the STATUS register (%ctl0).
Preceded by PFX:
Loads RA with the current contents of the control register selected by K. See
“Control Registers” on page 4. for a list of control registers and their indices.
Condition Codes: Flags: Unaffected
Instruction Format: Rw
Instruction Fields: A = Register index of operand RA
1514131211109876543210
011111 11001 A
NVZC
−−−−