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S3C84E5/C84E9/P84E9 CONTROL REGISTER
4-41
WTCON — Watch Timer Control Register FAH Set 1, Bank 0
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value 0 0 0 0 0 0 0 0
Read/Write R/W R/W R/W R/W R/W R/W R/W R/W
Addressing Mode Register addressing mode only
.7 Watch Timer Clock Selection Bit
0 Main system clock divided by 256 (fxx/256)
1 Sub system clock (fxt)
.6 Watch Timer Interrupt Enable Bit
0 Disable watch timer interrupt
1 Enable watch timer interrupt
.5–.4 Buzzer Signal Selection Bits
0 0 0.5 kHz buzzer (BZOUT) signal output
0 1 1 kHz buzzer (BZOUT) signal output
1 0 2 kHz buzzer (BZOUT) signal output
1 1 4 kHz buzzer (BZOUT) signal output
.3–.2 Watch Timer Speed Selection Bits
0 0 0.5 s Interval
0 1 0.25 s Interval
1 0 0.125 s Interval
1 1 1.955 ms Interval
.1 Watch Timer Enable Bit
0 Disable watch timer; Clear frequency dividing circuits
1 Enable watch timer
.0 Watch Timer Interrupt Pending Bit
0 Interrupt is not pending
1 Clear pending bit when write
1 Interrupt is pending