Samsung S3C84E5 Microphone User Manual


 
INSTRUCTION SET S3C84E5/C84E9/P84E9
6-20
BITR Bit Reset
BITR dst.b
Operation: dst(b) 0
The BITR instruction clears the specified bit within the destination without affecting any other bit in
the destination.
Flags: No flags are affected.
Format:
Bytes Cycles Opcode
(Hex)
Addr Mode
dst
opc dst | b | 0 2 4 77 rb
NOTE: In the second byte of the instruction format, the destination address is four bits, the bit
address “0” is three bits, and the LSB address value is one bit in length.
Example: Given: R1 = 07H:
BITR R1.1 R1 = 05H
If the value of the working register R1 is 07H (00000111B), the statement "BITR R1.1" clears bit one
of the destination register R1, leaving the value 05H (00000101B).