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S3C84E5/C84E9/P84E9 I/O PORTS
9-9
Port 2 Control Register, Low Byte (P2CONL)
EBH, Set1, Bank0, R/W, Reset value="00"
.7 .6 .5 .4 .3 .2 .1 .0MSB LSB
[.7-.6] P2.3/INT3 Configuration Bits
0 0 = Input mode with pull-up; falling edge interrupt (INT3)
0 1 = Input mode; falling edge interrupt (INT3)
1 0 = Input mode; rising edge interrupt (INT3)
1 1 = Push-pull output mode
[.5-.4] P2.2/INT2 Configuration Bits
0 0 = Input mode with pull-up; falling edge interrupt (INT2)
0 1 = Input mode; falling edge interrupt (INT2)
1 0 = Input mode; rising edge interrupt (INT2)
1 1 = Push-pull output mode
[.3-.2] P2.1/INT1 Configuration Bits
0 0 = Input mode with pull-up; falling edge interrupt (INT1)
0 1 = Input mode; falling edge interrupt (INT1)
1 0 = Input mode; rising edge interrupt (INT1)
1 1 = Push-pull output mode
[.1-.0] P2.0/INT0 Configuration Bits
0 0 = Input mode with pull-up; falling edge interrupt (INT0)
0 1 = Input mode; falling edge interrupt (INT0)
1 0 = Input mode; rising edge interrupt (INT0)
1 1 = Push-pull output mode
Figure 9-6. Port 2 Low-Byte Control Register (P2CONL)