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S3C84E5/C84E9/P84E9 MICROCONTROLLER xiii
List of Figures (Concluded)
Page Title Page
Number Number
12-1 Timer 1(0,1) Control Register (T1CON0, T1CON1)...................................................12-4
12-2 Timer A, Timer 1(0,1) Pending Register (TINTPND).................................................12-5
12-3 Timer 1(0,1) Functional Block Diagram..................................................................12-6
13-1 UART Control Register (UARTCON) ......................................................................13-3
13-2 UART Interrupt Pending Register (UARTPND) ........................................................13-4
13-3 UART Data Register (UDATA)...............................................................................13-5
13-4 UART Baud Rate Data Register (BRDATAH, BRDATAL).........................................13-6
13-5 UART Functional Block Diagram...........................................................................13-8
13-6 Timing Diagram for UART Mode 0 Operation ..........................................................13-9
13-7 Timing Diagram for UART Mode 1 Operation ..........................................................13-10
13-8 Timing Diagram for UART Mode 2 Operation ..........................................................13-12
13-9 Connection Example for Multiprocessor Serial Data Communications.......................13-14
14-1 Watch Timer Circuit Diagram................................................................................14-3
15-1 A/D Converter Control Register (ADCON)...............................................................15-2
15-2 A/D Converter Data Register (ADDATAH, ADDATAL)..............................................15-3
15-3 A/D Converter Circuit Diagram ..............................................................................15-3
15-4 A/D Converter Timing Diagram..............................................................................15-4
15-5 Recommended A/D Converter Circuit for Highest Absolute Accuracy........................15-5
16-1 Low Voltage Reset Circuit....................................................................................16-2
17-1 Input Timing for External Interrupts (Ports 4 and 6)..................................................17-5
17-3 Clock Timing Measurement at X
IN
.........................................................................17-7
17-4 Stop Mode Release Timing Initiated by RESET......................................................17-8
17-5 Stop Mode (Main) Release Timing Initiated by Interrupts .........................................17-8
17-6 Stop Mode (Sub) Release Timing Initiated by Interrupts...........................................17-9
17-7 Waveform for UART Timing Characteristics............................................................17-10
17-8 Operating Voltage Range .....................................................................................17-12
17-9 The Circuit Diagram to Improve EFT Characteristics................................................17-12
18-1 42-SDIP-600 Package Dimensions........................................................................18-1
18-2 44-QFP-1010 Package Dimensions.......................................................................18-2
19-1 S3P84E9 Pin Assignments (42-SDIP Package) .....................................................19-1
19-2 S3P84E9 Pin Assignments (44-QFP Package)......................................................19-2
20-1 SMDS+ or SK-1000 Product Configuration.............................................................20-2
20-2 S3C84E5/S3C84E9/S3P84E9 Target Board Configuration.......................................20-3
20-3 44-Pin Connector pin assignment for TB84E5/84E9................................................20-5
20-4 TB84E5/84E9 Adapter Cable for 44pin Connector Package .....................................20-6