Samsung S3C84E5 Microphone User Manual


 
INSTRUCTION SET S3C84E5/C84E9/P84E9
6-40
EI Enable Interrupts
EI
Operation: SYM (0) 1
The EI instruction sets bit zero of the system mode register, SYM.0 to "1". This allows interrupts to
be serviced as they occur (assuming they have the highest priority). If an interrupt's pending bit was
set while interrupt processing was disabled (by executing a DI instruction), it will be serviced when
the EI instruction is executed.
Flags: No flags are affected.
Format:
Bytes Cycles Opcode
(Hex)
opc 1 4 9F
Example: Given: SYM = 00H:
EI
If the SYM register contains the value 00H, that is, if interrupts are currently disabled, the statement
"EI" sets the SYM register to 01H, enabling all interrupts. (SYM.0 is the enable bit for global
interrupt processing.)