Samsung S3C84E5 Microphone User Manual


 
I/O PORTS S3C84E5/C84E9/P84E9
9-16
Port 4 Interrupt Pending Register (P4INTPND)
F3H, Set1, Bank0, R/W, Reset value="00"
.7 .6 .5 .4 .3 .2 .1 .0
MSB
LSB
[.7-.3] Not used
(must keep always 0)
[.2] P4.2/PND10, Interrupt Pending Bit
0 = No interrupt pending (when read) / Pending bit clear (when write)
1 = Interrupt is pending (when read) / No effect (when write)
[.1] P4.1/PND9, Interrupt Pending Bit
0 = No interrupt pending (when read) / Pending bit clear (when write)
1 = Interrupt is pending (when read) / No effect (when write)
[.0] P4.0/PND8, Interrupt Pending Bit
0 = No interrupt pending (when read) / Pending bit clear (when write)
1 = Interrupt is pending (when read) / No effect (when write)
Figure 9-13. Port 4 Interrupt Pending Register (P4INTPND)
Port 4 Interrupt Control Register (P4INT)
F2H, Set1, Bank0, R/W, Reset value="00"
.7 .6 .5 .4 .3 .2 .1 .0
MSB
LSB
[.7-.3] Not used
(must keep always 0)
[.2] P4.2 External Interrupt (INT10) Enable Bit
0 = Disable interrupt
1 = Enable interrupt
[.1] P4.1 External Interrupt (INT9) Enable Bit
0 = Disable interrupt
1 = Enable interrupt
[.0] P4.0 External Interrupt (INT8) Enable Bit
0 = Disable interrupt
1 = Enable interrupt
Figure 9-14. Port 4 Interrupt Control Register (P4INT)