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xii S3C84E5/C84E9/P84E9 MICROCONTROLLER
List of Figures (Continued)
Figure Title Page
Number Number
5-1 S3C8-Series Interrupt Types.................................................................................5-2
5-2 S3C84E5/C84E9/P84E9 Interrupt Structure ...........................................................5-4
5-3 ROM Vector Address Area...................................................................................5-5
5-4 Interrupt Function Diagram ...................................................................................5-8
5-5 System Mode Register (SYM)..............................................................................5-10
5-6 Interrupt Mask Register (IMR)...............................................................................5-11
5-7 Interrupt Request Priority Groups ..........................................................................5-12
5-8 Interrupt Priority Register (IPR) .............................................................................5-13
5-9 Interrupt Request Register (IRQ) ...........................................................................5-14
6-1 System Flags Register (FLAGS)...........................................................................6-6
7-1 Main Oscillator Circuit (Crystal or Ceramic Oscillator).............................................7-1
7-2 Sub-System Oscillator Circuit (Crystal Oscillator)...................................................7-1
7-3 System Clock Circuit Diagram..............................................................................7-2
7-4 System Clock Control Register (CLKCON).............................................................7-3
7-5 Oscillator Control Register (OSCCON)...................................................................7-4
7-6 STOP Control Register (STPCON) ........................................................................7-4
9-1 Port 0 High Byte Control Register (P0CONH).........................................................9-3
9-2 Port 0 Low Byte Control Register (P0CONL) ..........................................................9-4
9-3 Port 1 High-Byte Control Register (P1CONH).........................................................9-5
9-4 Port 1 Low-Byte Control Register (P1CONL) ..........................................................9-6
9-5 Port 2 High-Byte Control Register (P2CONH).........................................................9-8
9-6 Port 2 Low-Byte Control Register (P2CONL) ..........................................................9-9
9-7 Port 2 Interrupt Pending Register (P2INTPND)........................................................9-10
9-8 Port 2 Interrupt Control Register (P2INT) ................................................................9-11
9-9 Port 3 High-Byte Control Register (P3CONH).........................................................9-12
9-10 Port 3 Low-Byte Control Register (P3CONL) ..........................................................9-13
9-11 Port 4 High-Byte Control Register (P4CONH).........................................................9-15
9-12 Port 4 Low-Byte Control Register (P4CONL) ..........................................................9-15
9-13 Port 4 Interrupt Pending Register (P4INTPND)........................................................9-16
9-14 Port 4 Interrupt Control Register (P4INT) ................................................................9-16
10-1 Basic Timer Control Register (BTCON)..................................................................10-2
10-2 Basic Timer Block Diagram..................................................................................10-4
11-1 Timer A Control Register (TACON)........................................................................11-3
11-2 Timer A Functional Block Diagram........................................................................11-4
11-3 Timer B Functional Block Diagram........................................................................11-5
11-4 Timer B Control Register (TBCON)........................................................................11-6
11-5 Timer B Data Registers (TBDATAH, TBDATAL)......................................................11-6
11-6 Timer B Output Flip Flop Waveforms in Repeat Mode .............................................11-8