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8-BIT TIMER A/B S3C84E5/C84E9/P84E9
11-4
BLOCK DIAGRAM
NOTES:
1. When PWM mode, match signal cannot clear counter.
2. Pending bit is located at TINTPND register.
Clear
Match
TACON.7-.6
f xx/1024
f xx/256
f xx/64
TACK
TACON.2
Pending
TACON.3
Overflow
TAOVF
TACAP
TAOUT(TAPWM)
TINTPND.0
TACON.5.-4
Data Bus
8
Data Bus
8
M
U
X
M
U
X
8-bit Up-Counter
(Read Only)
8-bit Comparator
Timer A Buffer Reg
Timer A Data Register
(Read/Write)
M
U
X
TACON.1
Pending
TAINT
TINTPND.1
TACON.0
TACON.5.4
M
U
X
Figure 11-2. Timer A Functional Block Diagram