Samsung S3C84E5 Microphone User Manual


 
S3C84E5/C84E9/P84E9 RESET and POWER-DOWN
8-3
Table 8-2. S3C84E5/C84E9/P84E9 Set 1, Bank 0 Register Values After RESET
Register Name Mnemonic Address Bit Values After RESET
Dec Hex 7 6 5 4 3 2 1 0
Port 0 data register P0 224 E0H 0 0 0 0 0 0 0 0
Port 1 data register P1 225 E1H 0 0 0 0 0 0 0 0
Port 2 data register P2 226 E2H 0 0 0 0 0 0 0 0
Port 3 data register P3 227 E3H 0 0 0 0 0 0 0 0
Port 4 data register P4 228 E4H 0 0 0 0 0 0 0 0
STOP control register STPCON 229 E5H 0 0 0 0 0 0 0 0
Port 0 control register (high byte) P0CONH 230 E6H 0 0 0 0 0 0 0 0
Port 0 control register (low byte) P0CONL 231 E7H 0 0 0 0 1 1 1 1
Port 1 control register (high byte) P1CONH 232 E8H 0 0 0 0 0 0 0 0
Port 1 control register (low byte) P1CONL 233 E9H 0 0 0 0 0 0 0 0
Port 2 control register (high byte) P2CONH 234 EAH 0 0 0 0 0 0 0 0
Port 2 control register (low byte) P2CONL 235 EBH 0 0 0 0 0 0 0 0
Port 2 interrupt control register P2INT 236 ECH 0 0 0 0 0 0 0 0
Port 2 interrupt/pending register P2INTPND 237 EDH 0 0 0 0 0 0 0 0
Port 3 control register (high byte) P3CONH 238 EEH 0 0 0 0 0 0 0 0
Port 3 control register (low byte) P3CONL 239 EFH 0 0 0 0 0 0 0 0
Port 4 control register (high byte) P4CONH 240 F0H 0 0 0 0 0 0 0 0
Port 4 control register (low byte) P4CONL 241 F1H 0 0 0 0 0 0 0 0
Port 4 interrupt control register P4INT 242 F2H 0 0 0 0 0 0 0 0
Port 4 interrupt/pending register P4INTPND 243 F3H 0 0 0 0 0 0 0 0
UART pending register UARTPND 244 F4H 0 0 0 0 0 0 0 0
UART data register UDATA 245 F5H 1 1 1 1 1 1 1 1
UART control register UARTCON 246 F6H 0 0 0 0 0 0 0 0
A/D converter control register ADCON 247 F7H 0 0 0 0 0 0 0 0
A/D converter data register(high byte) ADDATAH 248 F8H 0 0 0 0 0 0 0 0
A/D converter data register(low byte) ADDATAL 249 F9H 0 0 0 0 0 0 0 0
Watch timer control register WTCON 250 FAH 0 0 0 0 0 0 0 0
Oscillator control register OSCCON 251 FBH 0 0 0 0 0 0 0 0
Location FCH is factory use only.
Basic timer counter register BTCNT 253 FDH 0 0 0 0 0 0 0 0
Location FEH is not mapped.
Interrupt priority register IPR 255 FFH x x x x x x x x