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1RapidIODocumentsandLinks...........................................................................................18
2PacketType.................................................................................................................23
3PinDescription..............................................................................................................24
4BitsofSERDES_CFGn_CNTLRegister(0x120-0x12c).............................................................26
5LineRateversusPLLOutputClockFrequency........................................................................27
6RATEBitEffects............................................................................................................27
7FrequencyRangeversusMPY...........................................................................................28
8BitsofSERDES_CFGRXn_CNTLRegisters...........................................................................28
9EQBits.......................................................................................................................30
10BitsofSERDES_CFGTXn_CNTLRegisters...........................................................................30
11SWINGBits.................................................................................................................31
12DEBits.......................................................................................................................31
13Control/CommandRegisterFieldMapping.............................................................................33
14StatusFields................................................................................................................34
15RXDMAStateHeadDescriptorPointer(HDP)(AddressOffset0x600-0x63C)...................................43
16RXDMAStateCompletionPointer(CP)(AddressOffset0x600-0x63C)...........................................43
17RXBufferDescriptorFieldDescriptions.................................................................................45
18TXDMAStateHeadDescriptorPointer(HDP)(AddressOffset0x500–0x53C).................................49
19TXDMAStateCompletionPointer(CP)(AddressOffset0x580–0x5BC)........................................49
20TXBufferDescriptorFieldDefinitions...................................................................................49
21WeightedRoundRobinProgrammingRegisters(AddressOffset0x7E0–0x7EC)..............................52
22FlowControlTableEntryRegisters(AddressOffset0x0900-0x093C)............................................61
23TransmitSourceFlowControlMasks...................................................................................62
24EnableandEnableStatusBitFieldDescriptions......................................................................66
25EmulationControlSignals.................................................................................................69
26InterruptSourceConfigurationOptions.................................................................................76
27InterruptConditionRoutingOptions.....................................................................................81
28SerialRapidIO(SRIO)Registers........................................................................................88
29PeripheralIDRegister(PID)FieldDescriptions........................................................................99
30PeripheralControlRegister(PCR)FieldDescriptions...............................................................100
31PeripheralSettingsControlRegister(PER_SET_CNTL)FieldDescriptions.....................................101
32PeripheralGlobalEnableRegister(GBL_EN)FieldDescriptions..................................................104
33PeripheralGlobalEnableStatusRegister(GBL_EN_STAT)FieldDescriptions.................................105
34BlocknEnableRegister(BLKn_EN)FieldDescriptions.............................................................106
35BlocknEnableStatusRegister(BLKn_EN_STAT)FieldDescriptions............................................107
36RapidIODEVICEID1Register(DEVICEID_REG1)FieldDescriptions............................................108
37RapidIODEVICEID2Register(DEVICEID_REG2)FieldDescriptions............................................109
38PacketForwardingRegisternfor16bDeviceIDs(PF_16B_CNTLn)FieldDescriptions.......................110
39PacketForwardingRegisternfor8bDeviceIDs(PF_8B_CNTLn)FieldDescriptions..........................111
40SERDESReceiveChannelConfigurationRegistersn(SERDES_CFGRXn_CNTL)FieldDescriptions.....112
41EQBits.....................................................................................................................113
42SERDESTransmitChannelConfigurationRegistersn(SERDES_CFGTXn_CNTL)FieldDescriptions.....114
43SWINGBits................................................................................................................115
44DEBits.....................................................................................................................115
45SERDESMacrosCFG(0-3)Registers(SERDES_CFGn_CNTL)FieldDescriptions...........................116
46DOORBELLnInterruptStatusRegister(DOORBELLn_ICSR)FieldDescriptions...............................117
47DOORBELLnInterruptClearRegister(DOORBELLn_ICCR)FieldDescriptions................................118
48RXCPPIInterruptStatusRegister(RX_CPPI_ICSR)FieldDescriptions.........................................119
49RXCPPIInterruptClearRegister(RX_CPPI_ICCR)FieldDescriptions..........................................120
10ListofTablesSPRU976–March2006
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