Filter
Top Products
www.ti.com
SRIOFunctionalDescription
HereisthefrequencyrangeversusMPY:
Table7.FrequencyRangeversusMPY
MPYRIOCLKandRIOCLKLineRateRange(Gbps)
Range(MHz)FullHalfQuarter
4x250-4252-3.41-1.70.5-0.85
5x200-4252-4.251-2.1250.5-1.0625
6x167-354.1672-4.251-2.1250.5-1.0625
8x125-265.6252-4.251-2.1250.5-1.0625
10x100-212.52-4.251-2.1250.5-1.0625
12x83.33-177.082-4.251-2.1250.5-1.0625
12.5x80-1702-4.251-2.1250.5-1.0625
15x66.67-141.672-4.251-2.1250.5-1.0625
20x50-106.252-4.251-2.1250.5-1.0625
25x40-852-4.251-2.1250.5-1.0625
50x25-42.52.5-4.251.25-2.1250.625-1.0625
60x25-35.423-4.251.5-2.1250.75-1.0625
2.3.2.2EnablingtheReceiver
Toenableareceiverfordeserialization,theENRXbitoftheassociatedSERDES_CFGRXn_CNTL
registers(0x100-0x10c)mustbesethigh.
WhenENRXislow,alldigitalcircuitrywithinthereceiverwillbedisabled,andclockswillbegatedoff.All
currentsourceswithinthereceiverwillbefullypowereddown,withtheexceptionofthoseassociatedwith
thelossofsignaldetectorandIEEE1149.6boundaryscancomparators.Lossofsignalpowerdownis
independentlycontrolledviatheLOSbitsofSERDES_CFGRXn_CNTL.
Table8.BitsofSERDES_CFGRXn_CNTLRegisters
BitFieldValueDescription
31:26ReservedReserved.
25ReservedReserved,keepaszeroduringwritestothisregister.
24ReservedReserved,keepaszeroduringwritestothisregister.
23ReservedReserved.
22:19EQEqualizer.Enablesandconfigurestheadaptiveequalizertocompensateforlossinthe
transmissionmedia.Forvalues,seeTable9.
18:16CDRClock/datarecovery.Configurestheclock/datarecoveryalgorithm.
000Firstorder.Phaseoffsettrackingupto±488ppm.
001Secondorder.Highestprecisionfrequencyoffsetmatchingbutpoorestresponsetochangesin
frequencyoffset,andlongestlocktime.Suitableforuseinsystemswithfixedfrequencyoffset.
010Secondorder.Mediumprecisionfrequencyoffsetmatching,frequencyoffsetchangeresponse
andlocktime.
011Secondorder.Bestresponsetochangesinfrequencyoffsetandfastestlocktime,butlowest
precisionfrequencyoffsetmatching.Suitableforuseinsystemswithspreadspectrumclocking.
100Firstorderwithfastlock.Phaseoffsettrackingupto±1953ppminthepresenceof..10101010..
trainingpattern,and±448ppmotherwise.
101Secondorderwithfastlock.Aspersetting001,butwithimprovedresponsetochangesin
frequencyoffsetwhennotclosetolock.
110Secondorderwithfastlock.Aspersetting010,butwithimprovedresponsetochangesin
frequencyoffsetwhennotclosetolock.
111Secondorderwithfastlock.Aspersetting011,butwithimprovedresponsetochangesin
frequencyoffsetwhennotclosetolock.
28SerialRapidIO(SRIO)SPRU976–March2006
SubmitDocumentationFeedback