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SRIOFunctionalDescription
2.3.9.1ResetSummary
Afterreset,thestateoftheperipheraldependsonthedefaultregistervaluesandtheBLKn_EN_INITtieoff
values.
Youcanalsoperformahardresetusingthesoftwareofeachlogicalblockwithintheperipheralviathe
GBL_ENandBLKn_ENbits.TheGBL_ENbitsresettheperipheral,whiletherestofthedeviceisnot
reset.TheBLKn_ENbitsshutdownunusedportionsoftheperipheral.The*ENfunctionalitywillminimize
powerbyresettingtheappropriatelogicalblock(s),andgatingofftheclocktotheappropriatelogical
block(s).Thisshouldbeconsideredanabruptresetindependentofthestateoftheperipheral,andshould
becapableofresettingtheperipheraltoitsoriginalstate.
Uponresetoftheperipheral,thedevicemustreestablishcommunicationwithitslinkpartner.Depending
onthesystem,thismayincludeadiscoveryphaseinwhichahostprocessorreadstheperipheral’s
CAR/CSRregisterstodetermineitscapabilities.Initssimplestform,itinvolvesretrainingtheSERDES
andgoingthroughtheinitializationphasetosynchronizeonbitandwordboundariesbyusingidleand
controlsymbols,asdescribedinsection5.5.2ofthePartVIoftheRapidIOspecification.Untilthe
peripheralanditspartnerarefullyinitializedandreadyfornormaloperation,theperipheralwillnotsend
anydatapacketsornon-statuscontrolsymbols.
•GBL_EN_INITandBLK_EN_INIT[n:0]:Thesemoduleboundarysignalsarestatictieoffswhichcontrol
thedefaultstateoftheGBL_ENandBLK_EN[n:0]MMRs.
•GBL_EN:ResetsallMMRs,excludingResetCtlValues(0x0000–0x1FC).Resetsalllogicalblocks
exceptMMRconfigurationbusi/f.Whileasserted,theslaveconfigurationbusisoperational.
•BLK_EN0:ResetsallMMRs,excludingResetCtlValues(0x0000–0x1FC).Otherlogicalblocksare
unaffected,includingMMRconfigurationbusi/f.
•BLK_EN[n:1]:Singleenable/resetperlogicalblock.
2.3.9.2EnableandEnableStatusRegisters
Figure31throughFigure38aretheregisterdiagramsfortheenableandenablestatusregisters.
Figure31.GBL_EN(Address0x0030)
3110
ReservedEN
R-0R/W-1
LEGEND:R=Read,W=Write,n=valueatreset
Figure32.GBL_EN_STAT(Address0x0034)
151098
ReservedBLK8_EN_STABLK7_EN_STA
TT
R-0R-1R-1
76543210
BLK6_EN_STABLK5_EN_STABLK4_EN_STABLK3_EN_STABLK2_EN_STABLK1_EN_STABLK0_EN_STAGBL_EN_STAT
TTTTTTT
R-1R-1R-1R-1R-1R-1R-1R-1
LEGEND:R=Read,W=Write,n=valueatreset
Figure33.BLK0_EN(Address0x0038)
3110
ReservedEN
R-0R/W-1
LEGEND:R=Read,W=Write,n=valueatreset
SPRU976–March2006SerialRapidIO(SRIO)65
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