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52Load/StoreModuleInterruptConditionRoutingRegisters............................................................82
53Error,Reset,andSpecialEventInterruptConditionRoutingRegisters............................................83
54SharingofISDRBits.......................................................................................................84
55ExampleDiagramofInterruptStatusDecodeRegisterMapping....................................................84
56INTDSTn_DecodeInterruptStatusDecodeRegister.................................................................85
57INTDSTn_RATE_CNTLInterruptRateControlRegister..............................................................86
58PeripheralIDRegister(PID)..............................................................................................99
59PeripheralControlRegister(PCR).....................................................................................100
60PeripheralSettingsControlRegister(PER_SET_CNTL)............................................................101
61PeripheralGlobalEnableRegister(GBL_EN)........................................................................104
62PeripheralGlobalEnableStatusRegister(GBL_EN_STAT).......................................................105
63BlocknEnableRegister(BLKn_EN)...................................................................................106
64BlocknEnableStatusRegister(BLKn_EN_STAT)..................................................................107
65RapidIODEVICEID1Register(DEVICEID_REG1)..................................................................108
66RapidIODEVICEID2Register(DEVICEID_REG2)..................................................................109
67PacketForwardingRegisternfor16bDeviceIDs(PF_16B_CNTLn)..............................................110
68PacketForwardingRegisternfor8bDeviceIDs(PF_8B_CNTLn).................................................111
69SERDESReceiveChannelConfigurationRegistersn(SERDES_CFGRXn_CNTL)............................112
70SERDESTransmitChannelConfigurationRegistersn(SERDES_CFGTXn_CNTL)...........................114
71SERDESMacrosCFG(0-3)Registers(SERDES_CFGn_CNTL).................................................116
72DOORBELLnInterruptStatusRegister(DOORBELLn_ICSR).....................................................117
73DOORBELLnInterruptClearRegister(DOORBELLn_ICCR)......................................................118
74RXCPPIInterruptStatusRegister(RX_CPPI_ICSR)...............................................................119
75RXCPPIInterruptClearRegister(RX_CPPI_ICCR)................................................................120
76TXCPPIInterruptStatusRegister(TX_CPPI_ICSR)................................................................121
77TXCPPIInterruptClearRegister(TX_CPPI_ICCR).................................................................122
78LSUStatusInterruptRegister(LSU_ICSR)...........................................................................123
79LSUClearInterruptRegister(LSU_ICCR)...........................................................................124
80Error,Reset,andSpecialEventStatusInterruptRegister(ERR_RST_EVNT_ICSR)..........................125
81Error,Reset,andSpecialEventClearInterruptRegister(ERR_RST_EVNT_ICCR)...........................126
82DOORBELLnInterruptConditionRoutingRegister(DOORBELLn_ICRR).......................................127
83DOORBELLnInterruptConditionRoutingRegister2(DOORBELLn_ICRR2)...................................128
84RXCPPIInterruptConditionRoutingRegister(RX_CPPI_ICRR)................................................129
85RXCPPIInterruptConditionRoutingRegister(RX_CPPI_ICRR2)...............................................130
86TXCPPIInterruptConditionRoutingRegister(TX_CPPI_ICRR).................................................131
87TXCPPIInterruptConditionRoutingRegister(TX_CPPI_ICRR2)...............................................132
88LSUModuleInterruptConditionRoutingRegister0(LSU_ICRR0)................................................133
89LSUModuleInterruptConditionRoutingRegister1(LSU_ICRR1)................................................134
90LSUModuleInterruptConditionRoutingRegister2(LSU_ICRR2)................................................135
91LSUModuleInterruptConditionRoutingRegister3(LSU_ICRR3)................................................136
92Error,Reset,andSpecialEventInterruptConditionRoutingRegister(ERR_RST_EVNT_ICRR)............137
93Error,Reset,andSpecialEventInterruptConditionRoutingRegister2(ERR_RST_EVNT_ICRR2)........138
94Error,Reset,andSpecialEventInterruptConditionRoutingRegister3(ERR_RST_EVNT_ICRR3)........139
95INTDSTnInterruptStatusDecodeRegisters(INTDSTn_DECODE)...............................................140
96INTDSTnInterruptRateControlRegisters(INTDSTn_RATE_CNTL).............................................141
97LSUnControlRegister0(LSUn_REG0)...............................................................................142
98LSUnControlRegister1(LSUn_REG1)...............................................................................143
99LSUnControlRegister2(LSUn_REG2)...............................................................................144
100LSUnControlRegister3(LSUn_REG3)...............................................................................145
101LSUnControlRegister4(LSUn_REG4)...............................................................................146
102LSUnControlRegister5(LSUn_REG5)...............................................................................147
103LSUnControlRegister6(LSUn_REG6)...............................................................................148
104LSUCongestionControlFlowMaskn(LSU_FLOW_MASKSn)...................................................149
SPRU976–March2006ListofFigures7
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