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Reserved
RIO_LSUn_FLOW_MASKS
(Address Offsets: 0x041C,
0x043C, 0x045C, 0x047C)
31-16
R, 0x0000
LSU n Flow Mask
15-0
R/W, 0xFFFF
TX Queue1
Flow Mask
RIO_TX_CPPI_FLOW_MASKS0
(Address Offsets: 0x0704)
31-16
R/W, 0xFFFF
TX Queue0
Flow Mask
15-0
R/W, 0xFFFF
TX Queue3
Flow Mask
RIO_TX_CPPI_FLOW_MASKS1
(Address Offsets: 0x0708)
31-16
R/W, 0xFFFF
TX Queue2
Flow Mask
15-0
R/W, 0xFFFF
TX Queue5
Flow Mask
RIO_TX_CPPI_FLOW_MASKS2
(Address Offsets: 0x070C)
31-16
R/W, 0xFFFF
TX Queue4
Flow Mask
15-0
R/W, 0xFFFF
TX Queue7
Flow Mask
RIO_TX_CPPI_FLOW_MASKS3
(Address Offsets: 0x0710)
31-16
R/W, 0xFFFF
TX Queue6
Flow Mask
15-0
R/W, 0xFFFF
TX Queue9
Flow Mask
RIO_TX_CPPI_FLOW_MASKS4
(Address Offsets: 0x0714)
31-16
R/W, 0xFFFF
TX Queue8
Flow Mask
15-0
R/W, 0xFFFF
TX Queue11
Flow Mask
RIO_TX_CPPI_FLOW_MASKS5
(Address Offsets: 0x0718)
31-16
R/W, 0xFFFF
TX Queue10
Flow Mask
15-0
R/W, 0xFFFF
TX Queue13
Flow Mask
RIO_TX_CPPI_FLOW_MASKS6
(Address Offsets: 0x071C)
31-16
R/W, 0xFFFF
TX Queue12
Flow Mask
15-0
R/W, 0xFFFF
TX Queue15
Flow Mask
RIO_TX_CPPI_FLOW_MASKS7
(Address Offsets: 0x0720)
31-16
R/W, 0xFFFF
TX Queue14
Flow Mask
15-0
R/W, 0xFFFF
SRIOFunctionalDescription
Figure28.TransmitSourceFlowControlMasks
Table23.TransmitSourceFlowControlMasks
NameBitAccessResetValueDescription
FlowMask0R/W1b0b–TXsourcedoesn’tsupportFlow0fromtableentry
1b–TXsourcedoessupportFlow0fromtableentry
FlowMask1R/W1b0b–TXsourcedoesn’tsupportFlow1fromtableentry
1b–TXsourcedoessupportFlow1fromtableentry
FlowMask2R/W1b0b–TXsourcedoesn’tsupportFlow2fromtableentry
1b–TXsourcedoessupportFlow2fromtableentry
FlowMask3R/W1b0b–TXsourcedoesn’tsupportFlow3fromtableentry
1b–TXsourcedoessupportFlow3fromtableentry
FlowMask4R/W1b0b–TXsourcedoesn’tsupportFlow4fromtableentry
1b–TXsourcedoessupportFlow4fromtableentry
FlowMask5R/W1b0b–TXsourcedoesn’tsupportFlow5fromtableentry
1b–TXsourcedoessupportFlow5fromtableentry
FlowMask6R/W1b0b–TXsourcedoesn’tsupportFlow6fromtableentry
1b–TXsourcedoessupportFlow6fromtableentry
FlowMask7R/W1b0b–TXsourcedoesn’tsupportFlow7fromtableentry
1b–TXsourcedoessupportFlow7fromtableentry
FlowMask8R/W1b0b–TXsourcedoesn’tsupportFlow8fromtableentry
1b–TXsourcedoessupportFlow8fromtableentry
FlowMask9R/W1b0b–TXsourcedoesn’tsupportFlow9fromtableentry
1b–TXsourcedoessupportFlow9fromtableentry
FlowMask10R/W1b0b–TXsourcedoesn’tsupportFlow10fromtableentry
1b–TXsourcedoessupportFlow10fromtableentry
FlowMask11R/W1b0b–TXsourcedoesn’tsupportFlow11fromtableentry
1b–TXsourcedoessupportFlow11fromtableentry
FlowMask12R/W1b0b–TXsourcedoesn’tsupportFlow12fromtableentry
1b–TXsourcedoessupportFlow12fromtableentry
FlowMask13R/W1b0b–TXsourcedoesn’tsupportFlow13fromtableentry
1b–TXsourcedoessupportFlow13fromtableentry
FlowMask14R/W1b0b–TXsourcedoesn’tsupportFlow14fromtableentry
1b–TXsourcedoessupportFlow14fromtableentry
FlowMask15R/W1b0b–TXsourcedoesn’tsupportFlow15fromtableentry
1b–TXsourcedoessupportFlow15fromtableentry
SerialRapidIO(SRIO) 62SPRU976–March2006
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