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Boot
Program
Host
Controller
Optional
I2C
EEPROM
DSP
ROM
1x RapidIO
SRIOFunctionalDescription
2.3.12BootloadCapability
2.3.12.1Configuration
ItisassumedthatanexternaldevicewillinitiatethebootloaddatatransferandmastertheDMAinterface.
Uponreset,thefollowingsequenceofeventsmustoccur:
1.DSPisplacedinSRIObootmodebyHWmodepins.
2.HosttakesDSPoutofreset(PORorRST).Theperipheral’sstatemachinesandregistersarereset.
3.Internalboot-strapROMconfiguresdeviceregisters,includingSERDES,andDMA.DSPexecutes
internalROMcodetoinitializeSRIO.
–Choiceof4pinselectableconfigurations
–Optionally,I2CbootcanbeusedtoconfigureSRIO
4.DSPexecutesidleinstruction.
5.RapidIOportssendIdlecontrolsymbolstotrainPHYs.
6.HostenabledtoexploresystemwithRapidIOMaintenancepackets.
7.Hostidentifies,enumeratesandinitializestheRapidIOdevice.
8.HostcontrollerconfiguresDSPperipheralsthroughmaintenancepackets.
–SRIODeviceIDsaresetforDSPs(eitherbypinstrappingorbyhostmanipulation)
9.BootCodesentfromhostcontrollertoDSPL2memorybaseaddressviaNWRITE.
10.DSPCPUisawakenedbyaninterruptsuchasaRapidIODOORBELLpacket.
11.BootCodeisexecutedandnormaloperationfollows.
Figure40.BootloadOperation
2.3.12.2BootloadDataMovement
ThesystemhostisresponsibleforwritingthebootloaddataintotheDSP’sL2memory.Assuch,bootload
isonlysupportedusingtheDirectI/Omodel,andnotthemessagepassingmodel.Bootloaddatamustbe
sentinpacketswithexplicitL2memoryaddressesindicatingproperdestinationwithintheDSP.Aspartof
theperipheral’sconfiguration,itshouldbesetuptotransferthedesiredbootloadprogramtotheDSP's
memorythroughnormalDMAbuscommands.
2.3.12.3DeviceWakeup
Uponcompletionofthebootloaddatatransfer,thesystemhostissuesaDOORBELLinterrupttotheDSP.
TheRapidIOperipheralprocessesthisinterruptinamannersimilartothatdescribedinSection4,
monitoringtheDMAbuswrite-with-responsecommandstoensurethatthedatahasbeencompletely
transferredthroughtheDMA.ThisinterruptwakesuptheCPUsbypullingthemoutoftheirresetstate.
The16-bitdatafieldoftheDOORBELLpacketshouldbeconfiguredtointerruptCore0bysettinga
correspondingICSRbitasdescribedinFigure43.
SerialRapidIO(SRIO) 72SPRU976–March2006
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