Filter
Top Products
www.ti.com
5.104PortIPModeCSR(SP_IP_MODE)
SRIORegisters
Figure160.PortIPModeCSR(SP_IP_MODE)
31-30292827262524-16
SP_MODEIDLE_TX_FIPW_DITGT_ISELF_Reserved
ERR_FO_BSD_DISRST
DISYPAS
S
R-0x00RW-RW-RW-R-RW-R-0x00
0x000x000x000x000x00
LEGEND:R=Readonly;-n=valueafterreset
15-6543210
ReservedMLTCMLTCRST_RST_PW_EPW_IR
_EN_IRQENCSNQ
R-0x00RW-RC-RW-RC-RW-RC-
0x000x000x000x000x000x00
LEGEND:R=Readonly;-n=valueafterreset
Table134.PortIPModeCSR(SP_IP_MODE)FieldDescriptions
BitFieldValueDescription
31-30SP_MODESRIOPortIPModeofoperation.
001x/4xLP-SerialRapidIOSpecification
014ports(1xmodeeach)
10Reserved
11Reserved
29IDLE_ERR_DISIDLEErrorcheckingdisable.
0Errorcheckingenabled(default),only|K|,|A|and|R|charactersareavailable.Ifinputreceivesany
othercharactersinidlesequence,itshouldentertheInput-Error-stoppedstate.
1Errorcheckingdisabled,allnotidleorinvalidcharactersduringidlesequenceareignored
28TX_FIFO_BYPASTransmitFIFO
S
0TheTX_FIFOisoperational(Default)
1TheTX_FIFOisbypassed.Thetxbclkandthesys_clkmustbelockedduringoperation,butthe
phasevariationupto1clockcycleisallowable.The4deepFIFOisusedtoaccommodatethe
phasedifference.
27PW_DISPort-WriteDisable.
0EnablePort-WriteErrorreporting(default)
1DisablePort-WriteErrorreporting
26TGT_ID_DISDestinationIDDecodeDisable-Definitionofpacketacceptancebythephysicallayer.
0PacketacceptedifDestID=BaseID.WhenDestIDisnotequaltoBaseID,thepacketisignored;
i.e.,itisacceptedbyRapidIOportbutisnotforwardedtologicallayer.
1PacketacceptedwithanyDestIDandforwardedtothelogicallayer.
25SELF_RSTSelfresetenable,when4Link-RequestResetControlSymbolsareaccepted.
0Selfresetinterruptdisabled(default),interruptsignalisasserted
1Selfresetinterruptenabled,theresetsignalisassertedbytheSRIO_TEresetcontroller.The
SRIO_TEconfigurationregistersaresettothedefaultvalueafterresetandlooseaboot
initializationvalues.
24-6ReservedReserved
5MLTC_ENMulticast-EventInterruptEnable.Ifenabled,theinterruptsignalisHighwhentheMulticast-Event
controlsymbolisreceivedbyanyport.
0bMulticastinterruptdisable
1bMulticastinterruptenable
4MLTC_IRQMulticast-EventInterruptStatusbit.ItisHighwhentheMulticast-Eventcontrolsymbolisreceived
byanyport.Onceset,itremainssetuntilwrittenwithlogic1toclear.Themltc_irqoutputsignalis
drivenbythisbit.
208SerialRapidIO(SRIO)SPRU976–March2006
SubmitDocumentationFeedback