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SRIOFunctionalDescription
Table20.TXBufferDescriptorFieldDefinitions(continued)
FieldDescription
ttRapidIOttfieldspecifying8-or16-bitDeviceIDs
00:8bdeviceIDs
01:16bdeviceIDs
10:reserved
11:reserved
PortIDPortnumberforroutingoutgoingpacket.
SSIZERIOstandardmessagepayloadsize.Indicateshowthehardwareshouldsegmentthe
outgoingmessagebyspecifyingthemaximumnumberofdouble-wordsperpacket.If
themessageisamulti-segmentmessage,thisfieldremainsthesameforalloutgoing
segments.Allsegmentsofthemessage,exceptforthelastsegment,havepayloads
equaltothissize.Thelastmessagesegmentmaybeequalorlessthanthissize.
Maximummessagesizefora16segmentmessageisshownbelow.
Message_length/16mustbelessthanorequaltoSsize,ifnot,themessageisnotsent
andCC101bisset.
0000b-1000b:Reserved
1001b:1Double-wordpayload(Supportsuptoa128Bmessage)
1010b:2Double-wordpayload(Supportsuptoa256Bmessage)
1011b:4Double-wordpayload(Supportsuptoa512Bmessage)
1100b:8Double-wordpayload(Supportsuptoa1024Bmessage)
1101b:16Double-wordpayload(Supportsuptoa2048Bmessage)
1110b:32Double-wordpayload(Supportsuptoa4096Bmessage)
1111b:Reserved
mailboxDestinationMailbox:Specifiesthemailboxtowhichthemessagewillbesent.
000000b:Mailbox0
000001b:Mailbox1
...
000100b:Mailbox4
...
111111b:Mailbox63
Formulti-segmentmessages,onlythe2LSBsofthismailboxfieldarevalid.Hardware
willignorethe4MSBsofthisfieldiftheoutgoingmessageismulti-segment.
Oncetheportcontrolsthebufferdescriptor,theDEST_IDfieldcanbequeriedtodetermineflowcontrol.If
thetransactionhasbeenflowcontrolled,theDMAbusREADrequestispostponedsothattheTXbuffer
spaceisnotwasted.Becausebufferdescriptorscannotbereorderedinthelinklist,ifthetransactionat
theheadofthebufferdescriptorqueueisflowcontrolled,HOLblockingwilloccuronthatqueue.When
thisoccurs,alltransactionslocatedinthatqueuearestalled.Tocountertheaffectsandreduceback-upof
moreTXpackets,multiplequeuesareavailable.Theperipheralsupportsatotalof16assignableTX
queuesandtheirassociatedTXDMAstateregisters.Thetransmissionorderbetweenqueuesisbasedon
programmableweightedround-robinatthemessagelevel.Theprogrammableregistersareshownin
Figure23.Thisschemeallowsconfigurabilityofthequeuetransmissionorder,aswellastheweightof
eachqueuewithintheroundrobin.UponenablingtheperipheralwiththePeripheralControlRegister
(0x0004),theTXstatemachinebeginsbyprocessingtheTX_Queue_Map0.Itwillattempttoprocessthe
queueandnumberofbufferdescriptorsfromthatqueueprogrammedinthismapper.Thenitwillmoveto
TX_Queue_Map1,followedbyTX_Queue_Map2andsoforth.Itisimportanttonotethatthismapping
orderisfixedinacircularpattern.Eachmappercanpointtoanyqueueandmultiplemapperscanpointto
asinglequeue.Ifamapperpointstoanin-activequeue,theperipheralrecognizesthisandmovestothe
nextmapper.Inorderforanactivequeuetotransmitpackets,atleastonemappermustbepointingto
thatqueue.Thedefaultsettingsdictateanequallyweightedroundrobinthatstartsonqueue0and
incrementsbyoneuntilreachingqueue15.Iftheapplicationrequiresprecisecontrolovertheorderofdata
sentoutofthedeviceafterpoweruporreset,youshouldprogramthemapcontrolregisters,setupthe
TXqueuesandinitializetheHDP,andfinallyenabletheperipheralwiththePeripheralControlRegister.
SPRU976–March2006SerialRapidIO(SRIO)51
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