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5.30TXCPPIInterruptConditionRoutingRegister(TX_CPPI_ICRR)
SRIORegisters
Figure86.TXCPPIInterruptConditionRoutingRegister(TX_CPPI_ICRR)
3128272423201916
ICR7ICR6ICR5ICR4
R/W-0x00R/W-0x00R/W-0x00R/W-0x00
15121187430
ICR3ICR2ICR1ICR0
R/W-0x00R/W-0x00R/W-0x00R/W-0x00
LEGEND:R=Read,W=Write,n=valueatreset
Table60.TXCPPIInterruptConditionRoutingRegister(TX_CPPI_ICRR)FieldDescriptions
BitFieldValueDescription
31-0ICR(0-7)TXCPPIInterruptconditionroutingbits
SPRU976–March2006SerialRapidIO(SRIO)131
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