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5.32LSUModuleInterruptConditionRoutingRegister0(LSU_ICRR0)
SRIORegisters
Figure88.LSUModuleInterruptConditionRoutingRegister0(LSU_ICRR0)
3128272423201916
ICR7ICR6ICR5ICR4
R/W-0000R/W-0000R/W-0000R/W-0000
15121187430
ICR3ICR2ICR1ICR0
R/W-0000R/W-0000R/W-0000R/W-0000
LEGEND:R=Read,W=Write,n=valueatreset
Table62.LSUModuleInterruptConditionRoutingRegister0(LSU_ICRR0)FieldDescriptions
BitFieldValueDescription
31-0ICR(7-0)Load/Storemoduleinterruptconditionroutingbits
SPRU976–March2006SerialRapidIO(SRIO)133
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