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Serial RapidIO 1x Device to 1x Device Interface Diagram
Serial RapidIO 4x Device to 4x Device Interface Diagram
1x Device
TD[0]
TD[0]
RD[0]
RD[0]
TD[0]
TD[0]
1x Device
RD[0]
RD[0]
RD[0-3]
RD[0-3]
4x Device
TD[0-3]
RD[0-3]
RD[0-3]
TD[0-3]
4x Device
TD[0-3]
TD[0-3]
1.2RapidIOFeatureSupportinSRIO
Overview
Figure3.SerialRapidIODevicetoDeviceInterfaceDiagrams
FeaturesSupportedinSRIO:
•RapidIOInterconnectSpecificationV1.2compliance,Errata1.2
•LP-SerialSpecificationV1.2compliance
•4XSerialRapidIOwithauto-negotiationto1Xport,optionaloperationforfour1Xports
•IntegratedclockrecoverywithTISERDES
•HardwareerrorhandlingincludingCyclicRedundancyCode(CRC)
•DifferentialCMLsignalingsupportingACandDCcoupling
•Supportfor1.25,2.5,and3.125Gbpsrates
•Power-downoptionforunusedports
•Read,write,writewithresponse,streamingwrite,outgoingAtomic,andmaintenanceoperations
•GeneratesinterruptstotheCPU(Doorbellpacketsandinternalscheduling)
•Supportfor8band16bdeviceID
•Supportforreceiving34baddresses
•Supportforgenerating34b,50b,and66baddresses
•Supportforthefollowingdatasizes:byte,half-word,word,double-word
•Bigendiandatatransfers
•DirectIOtransfers
•Messagepassingtransfers
•Datapayloadsofupto256B
•Singlemessagesconsistingofupto16packets
•ElasticstorageFIFOsforclockdomainhandoff
•Shortrunandlongruncompliance
•SupportforErrorManagementExtensions
•SupportforCongestionControlExtensions
•Supportforonemulti-castID
SPRU976–March2006SerialRapidIO(SRIO)17
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