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5.80PortGeneralControlCSR(SP_GEN_CTL)
SRIORegisters
Figure136.PortGeneralControlCSR(SP_GEN_CTL)
31302928-16
HOSTMASTDISCOReserved
ER_EVERE
NABLD
E
RW-RW-RW-R-0x00
0x000x000x00
LEGEND:R=Readonly;-n=valueafterreset
15-0
Reserved
R-0x00
LEGEND:R=Readonly;-n=valueafterreset
Table110.PortGeneralControlCSR(SP_GEN_CTL)FieldDescriptions
BitFieldValueDescription
31HOSTAHostdeviceisadevicethatisresponsibleforsystemexploration,initialization,andmaintenance.
AgentorslavedevicesaretypicallyinitializedbyHostdevices.
0bAgentorSlavedevice
1bHostdevice
30MASTER_ENABLTheMasterEnablebitcontrolswhetherornotadeviceisallowedtoissuerequestsintothesystem.
EIftheMasterEnableisnotset,thedevicemayonlyrespondtorequests.
0bProcessingelementcannotissuerequests
1bProcessingelementcanissuerequests
29DISCOVEREDThisdevicehasbeenlocatedbytheprocessingelementresponsibleforsystemconfiguration.
0bThedevicehasnotbeenpreviouslydiscovered
1bThedevicehasbeendiscoveredbyanotherprocessingelement
28-0ReservedReserved
SerialRapidIO(SRIO) 182SPRU976–March2006
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