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When operating
in
Protected Mode, the segment
base,
limit, and other attributes within the segment
cache registers are defined as shown
in
Figure 4-12.
In
Protected Mode, each of these fields are defined
according to the contents of the segment descriptor
indexed by the
selector value loaded into the seg-
ment register.
SEGMENT
DESCRIPTOR
CACHE
REGISTER
CONTENTS
32
-
BIT
BASE
(UPDATED
DURING
SELECTOR
LOAD
INTO
SEGMENT
REGISTER)
32
-
BIT
LIMIT
(UPDATED
DURING
SELECTOR
LOAD
INTO
SEGMENT
REGISTER)
OTHER
ATTRIBUTES
(UPDATED
DURING
SELECTOR
LOAD
INTO
SEGMENT
REGISTER)
CONFORMING
PRIVILEGE
-----------------------.,
STACK
SIZE-----------------------,
EXECUTABLE-----------------------,
WRITEABLE
--------------------~
READABLE--------------------,
EXPANSION
DIRECTION
1
GRANULARITY
ACCESSED
1
~:!~~~~E
_
L~~E~
~~s~
___________
:I~I!
______
~
J 1
___
_
CS
BASE
PER
SEG
DESCR
LIMIT
PER
SEG
DESCR
P
d d d d
d
N
SS
BASE
PER
SEG
DESCR
LIMIT
PER
SEG
DESCR
P
d d d d
r w
OS
ES
FS
GS
Key:
Y = fixed yes
N
= fixed no
BASE
PER
SEG
DESCR
BASE
PER
SEG
DESCR
BASE
PER
SEG
DESCR
BASE
PER
SEG
DESCR
d = per segment descriptor
LIMIT
PER
SEG
DESCR
p
d d
LIMIT
PER
SEG
DESCR
p
d
d
LIMIT
PER
SEG
DESCR
P
d d
LIMIT
PER
SEG
DESCR
p
d d
p
= per segment descriptor; descriptor must indicate "present" to avoid exception
11
(exception
12
in
case of
SS)
d
d
d
d
r
= per segment descriptor, but descriptor must indicate "readable" to avoid exception
13
(special case for
SS)
w = per segment descriptor, but descriptor must indicate "writable" to avoid exception
13
(special case for SS)
- = does not apply to that segment cache register
d d d
d
d d
d d d
d d d
Y -
d
N
d
-
N
- -
N
- -
N
- -
N
- -
231630-61
Figure 4-12. Segment Descriptor Caches for Protected Mode (Loaded per Descriptor)
43