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SYSTEM ARCHITECTURE
of
reference principle suggests that the new entry
is
likely to be used again in the near future.
While enabling paging does not increase address
translation time,
it
does make instruction execu-
tion time vary slightly, due to the occasional TLB
misses.
By
disabling paging, real-time systems
can eliminate this potential response time variable.
Figure
3-7
shows the basic content
of
a page table
entry (PTE). Directory entries are identical,
except that the page address field
is
interpreted
as the physical address
of
a page table, rather
than a page.
Tasks can share individual pages
or
entire page
tables. Entries in different page tables that point
to the same page are aliases
of
one another just as
descriptors with the same base address are aliases
of
one another. The 80386's two-level page table
structure makes
it
easier to share pages between
tasks by sharing entire page tables.
Since the
liNEAR
ADDRESS
31
21
DIRECTORY
PAGE
J
11
.Jl
address
of
a page shared in this way exists in a
single page table, the operating system has one
page table entry to update when
it
moves the
page.
3.3.4 Virtual Memory
Virtual memory allows very large programs,
or
groups
of
programs, to run in much smaller
amounts
of
physical memory without overlays.
Virtual memory systems can be based on either
segments
or
pages. In either case, the basic idea
of
virtual memory
is
to exploit the much lower
cost
of
disk storage compared to semiconductor
memory. A virtual memory operating system
stores all segments
or
pages in a large disk area,
often called the swap area. The much smaller
physical
("real') memory holds only the most
frequently used segments
or
pages. So long as the
segments
or
pages stored on disk are used
4GB
0
OFFSET
J
l
PHYSICAL
~
ADDRESS
:J::
]
4KB
PAGE
~
DIR. ENTRY
n'-f
PG.
TBl.
ENTRY
~
CR3
I
(PAGE TABLE
DIRECTORY BASE)
PAGE
TABLE
DIRECTORY
(1024 ENTRIES)
~
~
""'1:
:....f'"
PAGE TABLES
(1024 ENTRIES
EACH)
....
....
...
'-'C
>r
o
PHYSICAL
ADDRESS
SPACE
Figure
3-6.
Linear
to
Physical
Address
Translation
3-8