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80386
CLK2[
(82384
CLK)
[
HOLD
[
HLDA
[
8EO#-8E3#, A2-A31, [
M/IO#,
D/c#,
W/R#
ADS#
[
TIP
CYCLE
1
PIPELINED
(WRITE)
T21 T21
HOLD
CYCLE
2
ACKNOWLEDGE
NON-PIPELINED
(READ)
Th
Th
TI
T2
NA#
[
..Qja~-4~~~~~~~~~~~~
231630-31
NOTE:
HOLD is a synchronous input and can be asserted at any CLK2 edge, provided setup and hold
(t23
and
t24)
require-
ments are met. This waveform is useful for determining Hold Acknowledge latency.
Figure 5-27. Requesting Hold from Active Bus (NA # asserted)
5.6 SELF-TEST SIGNATURE
Upon completion of self-test, (if self-test was re-
quested
by
holding BUSY #
LOW
at
least eight
CLK2 periods before and after the falling edge of
RESET), the EAX register will contain a signature of
OOOOOOOOh
indicating the 80386 passed its self-test
of
microcode and major
PLA
contents with no prob-
lems detected. The passing signature in EAX,
OOOOOOOOh,
applies to all 80386 revision levels. Any
non-zero signature indicates the 80386 unit is
faulty.
5.7 COMPONENT AND REVISION
IDENTIFIERS
To assist 80386 users, the 80386 after reset holds a
component identifier and a revision identifier in its
OX
91
register. The upper 8 bits of
OX
hold 03h as identifi-
cation of the 80386 component. The
lower 8 bits of
OX
hold
an
8-bit unsigned binary number related to
the component revision
level. The revision identifier
begins
chronologically with a value zero and is sub-
ject to change (typically it will be incremented) with
component steppings intended to have certain im-
provements or distinctions from previous step pings.
These features are intended to assist 80386 users
to a
practical extent. However, the revision identifier
value
is
not guaranteed to change with every step-
ping revision, or to
follow a completely uniform nu-
merical sequence, depending on the type or inten-
tion of revision, or manufacturing
materials required
to be changed.
Intel has sole discretion over these
characteristics of the component.