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Table 2-2d
Logical
Instructions
(Continued)
Table 2-2f. Program
Control
Instructions
SHIFTS
(Continued)
SHL/SHR Shift logical left or right
UNCONDITIONAL TRANSFERS
SAL/SAR Shift
arithmetic left
or
right
CALL
Call procedure/task
SHLD/
RET Return from procedure
SHRD
Double shift left or right
JMP Jump
ROTATES
ITERATION CONTROLS
ROL/ROR
Rotate left/right
LOOP Loop
RCLIRCR Rotate through carry left/right
LOOPE/
Table 2-2e Bit Manipulation Instructions
LOOPZ
Loop if equal/zero
SINGLE BIT INSTRUCTIONS
BT Bit Test
BTS Bit Test and Set
BTR
Bit Test and Reset
BTC Bit Test and Complement
BSF
Bit Scan Forward
BSR
Bit Scan Reverse
BIT STRING INSTRUCTIONS
IBTS Insert
Bit String
XBTS Exact Bit String
Table 2-2f Program
Control
Instructions
CONDITIONAL TRANSFERS
LOOPNE/
LOOPNZ
Loop if not equal/not zero
JCXZ JUMP if register
CX
= 0
INTERRUPTS
INT Interrupt
"INTO
Interrupt if overflow
IRET Return from Interrupt/Task
CLI
Clear interrupt Enable
SLI Set Interrupt Enable
Table 2 2g High Level Language
Instructions
-
BOUND Check Array Bounds
ENTER
Setup Parameter Block for Entering
Procedure
SETCC Set byte equal to condition code
LEAVE
Leave Procedure
JA/JNBE
Jump if
above/not
below nor equal
Table 2-2h Protection Model
JAE/JNB
Jump if above or equal/not below
JB/JNAE
Jump if
below/not
above nor equal
JBE/JNA
Jump if below or
equal/not
above
JC
Jump if carry
JE/JZ
Jump if equal/zero
JG/JNLE
Jump if greater/not less nor equal
JGE/JNL
Jump if greater or
equal/not
less
JL/JNGE
Jump if
less/not
greater nor equal
JLE/JNG Jump if less or
equal/not
greater
JNC
Jump if not carry
JNE/JNZ
Jump if not equal/not zero
JNO Jump if not overflow
SGDT Store Global Descriptor Table
SIDT Store Interrupt Descriptor Table
STR Store
Task Register
SLDT Store Local Descriptor Table
LGDT Load Global Descriptor Table
LlDT Load Interrupt Descriptor Table
LTR
Load Task Register
LLDT
Load
Local Descriptor Table
ARPL
Adjust Requested Privilege
Level
LAR
Load Access Rights
LSL Load Segment Limit
VERR/
JNP/JPO
Jump if not parity/parity odd
VERW Verify Segment for Reading or Writing
JNS Jump if not sign
LMSW
Load Machine Status Word (lower
JO
Jump if overflow
16 bits of
CRO)
JP/JPE Jump if parity/parity even
SMSW Store Machine Status Word
JS
Jump if Sign
Table 2-2i Processor Control Instructions
HLT Halt
WAIT Wait until BUSY # negated
ESC
Escape
LOCK Lock Bus
16