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80386
U/S
W/R
Access Type
0
0 Supervisor'
Read
0 1 Supervisor Write
1
0 User Read
1
1 User Write
'Descriptor table access will fault with u/s
0,
even
lithe
program
is
executing at level 3.
Figure 4-238. Type
of
Access
Causing Page Fault
4.5.6 Operating System
Responsibilities
The 80386 takes care of the page address transla-
tion process, relieving the burden from
an
operating
system
in
a demand-paged system. The operating
system
is
responsible for setting up the initial page
tables, and handling any page faults. The operating
system also
is
required to invalidate (i.e. flush) the
TLB when any changes are made
tD
any of the page
table entries. The operating system must reload
CR3
to cause the TLB to be flushed.
Setting
up
the tables
is
simply a matter of loading
CR3
with the address of the Page Directory, and
allocating space for the Page Directory and the
Page Tables. The primary responsibility of
th~
oper-
ating system
is
to implement a swapping policy and
handle all of the page faults.
A final concern of the operating system
is
to ensure
that the TLB cache matches the information
in
the
paging tables.
In
particular, any time the operating
system sets the P present bit of page table entry to
zero, the TLB must be flushed. Operating systems
may want to take advantage of the fact that CR3
is
stored as part of a TSS, to give every task or group
of tasks its own set of page tables.
4.6
VIRTUAL 8086 ENVIRONMENT
4.6.1
Executing 8086 Programs
The 80386 allows the execution of 8086 application
programs
in
both Real Mode
and
in
the Virtual 8086
Mode (Virtual Mode). Of the two methods, Virtual
8086 Mode offers the system designer the most
flexibility. The Virtual
8086 Mode allows the execu-
tion of 8086 applications, while still allowing the sys-
tem designer to take full advantage of the 80386
protection mechanism.
In
particular, the 80386 al-
lows the simultaneous execution of 8086 operating
systems and its applications, and
an
80386 ope rat-
55
ing
system and both 80286 and 80386 applications.
Thus,
in
a multi-user 80386 computer, one person
could be running
an
MS-DOS spreadsheet, another
person using MS-DOS, and a third person could be
running multiple Unix utilities and applications. Each
person
in
this scenario would believe that he had the
computer completely to himself. Figure 4-24
Illus-
trates this concept.
4.6.2 Virtual 8086 Mode Addressing
Mechanism
One of the major differences between 80386 Real
and Protected modes
is
how the segment selectors
are interpreted. When the processor
is
executing
in
Virtual 8086 Mode the segment registers are used
in
an
identical fashion to Real Mode. The contents of
the segment register
is
shifted left 4 bits and added
to the offset to form the segment base linear
ad-
dress.
The
80386 allows the operating system to specify
which programs use the
8086 style address mecha-
nism,
and
which programs use Protected Mode ad-
dressing, on a per task basis. Through the use of
paging, the one megabyte address space of the
Vir-
tual Mode task can
be
mapped to anywhere
in
the 4
gigabyte linear address space
?f the 80386. Like
Real Mode, Virtual Mode
effeclive addresses
(I.e.,
segment offsets) that exceed 64K byte will cause
an
exception
13.
However, these restrictions should
~ot
prove to be important, because most tasks running
in
Virtual 8086 Mode will simply be existing 8086
application programs.
4.6.3 Paging
In
Virtual Mode
The paging hardware allows the concurrent running
of multiple Virtual Mode tasks,
and
provides protec-
tion and operating system isolation. Although it
is
not strictly necessary to have the paging hardware
enabled to
run
Virtual Mode tasks, it
is
needed
In
order to
run
multiple Virtual Mode tasks or to relo-
cate the address space of a Virtual Mode task to
physical address space greater than one megabyte.
The paging hardware allows the 20-bit linear
ad-
dress produced by a Virtual Mode program to be
divided into
up
to 256 pages. Each one of the pages
can be located anywhere within the maximum 4
giga-
byte physical address space of the 80386.
In
~ddi
tion, since CR3 (the Page Directory Base Register)
is
loaded
by
a task switch, each Virtual Mode task
can use a different mapping scheme to map pages
to different physical locations. Finally, the paging
hardware allows the sharing of the
8086 operating
system code between multiple
8086 applications.